Timing Diagrams; Replaced Timing Diagrams - Analog Devices AD5235 Manual

AD5235

TIMING DIAGRAMS

CS
CLK
CPOL = 1
HIGH
OR LOW
SDI
t
8
SDO
t
14
RDY
*NOTE: EXTRA BIT THAT IS NOT DEFINED, BUT NORMALLY LSB OF CHARACTER PREVIOUSLY TRANSMITTED.
THE CPOL = 1 MICROCONTROLLER COMMAND ALIGNS THE INCOMING DATA TO THE POSITIVE EDGE OF THE CLOCK.
CS
CLK
CPOL = 0
HIGH
OR LOW
SDI
t
8
SDO
t
14
RDY
*NOTE: EXTRA BIT THAT IS NOT DEFINED, BUT NORMALLY MSB OF CHARACTER JUST RECEIVED.
THE CPOL = 0 MICROCONTROLLER COMMAND ALIGNS THE INCOMING DATA TO THE POSITIVE EDGE OF THE CLOCK.
t
1
t
2
t
B23
5
t
4
t
B23–MSB
B24* B23–MSB
Figure 2. CPHA = 1 Timing Diagram
t
1
t
2
t
5
B23
t
4
t
t
6
B23–MSB IN
t
10
B23–MSB OUT
Figure 3. CPHA = 0 Timing Diagram
CPHA = 1
t
7
6
t
t
11
10
CPHA = 0
7
B0–LSB
t
11
B0–LSB
Rev. B | Page 6 of 28
t
12
t
t
13
3
B0
t
17
B0–LSB
t
9
B0–LSB
t
15
t
16
t
12
t t
3 13
t
B0
17
HIGH
OR LOW
t
9
*
t
15
t
16
HIGH
OR LOW