Advanced Control Modes - Analog Devices AD5235 Manual

Nonvolatile memory, dual 1024-position digital potentiometer
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AD5235

ADVANCED CONTROL MODES

The AD5235 digital potentiometer includes a set of user
programming features to address the wide number of
applications for these universal adjustment devices.
Key programming features include:
• Scratchpad programming to any desirable values
• Nonvolatile memory storage of the scratchpad RDAC register
value in the EEMEM register
• Increment and decrement instructions for the RDAC wiper
register
• Left and right bit shift of the RDAC wiper register to achieve
±6 dB level changes
• 26 extra bytes of user-addressable nonvolatile memory
Linear Increment and Decrement Instructions
The increment and decrement instructions (14, 15, 6, and 7) are
useful for linear step-adjustment applications. These commands
simplify microcontroller software coding by allowing the
controller to send just an increment or decrement command to
the device. The adjustment can be individual or ganged control.
For an increment command, executing Instruction 14 automati-
cally moves the wiper to the next resistance segment position.
The master increment command, Instruction 15, moves all
resistor wipers up by one position.
Logarithmic Taper Mode Adjustment
Four programming instructions produce logarithmic taper
increment and decrement of the wiper position control by
either individual or ganged control. The 6 dB increment is
activated by Instructions 12 and 13, and the 6 dB decrement is
activated by Instructions 4 and 5. For example, executing the
increment Instruction 12 eleven times moves the wiper in 6 dB
per step from 0% to full scale, R
near the maximum setting, the last 6 dB increment instruction
causes the wiper to go to the full-scale 1023 code position.
Further 6 dB per increment instructions do not change the
wiper position beyond its full scale (see Table 8).
The 6 dB step increments and 6 dB step decrements are
achieved by shifting the bit internally to the left or right,
respectively. The following information explains the nonideal
±6 dB step adjustment under certain conditions. Table 8
illustrates the operation of the shifting function on the RDAC
register data bits. Each table row represents a successive shift
operation. Note that the left-shift 12 and 13 instructions were
modified such that, if the data in the RDAC register is equal to
zero and the data is shifted left, the RDAC register is then set to
Code 1. Similarly, if the data in the RDAC register is greater
than or equal to midscale and the data is shifted left, then the
. When the wiper position is
AB
data in the RDAC register is automatically set to full scale. This
makes the left-shift function as ideal a logarithmic adjustment
as possible.
The right-shift 4 and 5 instructions are ideal only if the LSB is 0
(ideal logarithmic = no error). If the LSB is a 1, the right-shift
function generates a linear half-LSB error, which translates to a
number-of-bits dependent logarithmic error, as shown in Figure
42. The plot shows the error of the odd numbers of bits for the
AD5235.
Table 8. Detail Left-Shift and Right-Shift Functions for 6 dB
Step Increment and Decrement
Left-Shift
(+6 dB/Step)
Actual conformance to a logarithmic curve between the data
contents in the RDAC register and the wiper position for each
right-shift 4 and 5 command execution contains an error only
for odd numbers of bits. Even numbers of bits are ideal. The
graph in Figure 42 shows plots of Log_Error [20 × log
(error/code)] for the AD5235. For example, Code 3 Log_Error =
20 × log
(0.5/3) = −15.56 dB, which is the worst case. The plot
10
of Log_Error is more significant at the lower codes.
0
–20
–40
–60
–80
0
0.1
Figure 42. Plot of Log_Error Conformance for Odd Numbers of Bits Only
Rev. B | Page 18 of 28
Left-Shift
Right-Shift
00 0000 0000
11 1111 1111
00 0000 0001
01 1111 1111
00 0000 0010
00 1111 1111
00 0000 0100
00 0111 1111
00 0000 1000
00 0011 1111
00 0001 0000
00 0001 1111
00 0010 0000
00 0000 1111
00 0100 0000
00 0000 0111
00 1000 0000
00 0000 0011
01 0000 0000
00 0000 0001
10 0000 0000
00 0000 0000
11 1111 1111
00 0000 0000
11 1111 1111
00 0000 0000
0.2
0.3
0.4
0.5
0.6
0.7
0.8
CODE (From 1 to 1023 by 2.0 × 10
(Even Numbers of Bits Are Ideal)
Right-Shift
(–6 dB/Step)
10
0.9
1.0
1.1
3
)

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