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In Table 6, command bits are C0 to C3, address bits are A0 to A3, data bits D0 to D9 are applicable to RDAC, and D0 to D15 are applicable
to EEMEM.
Table 6. 24-Bit Serial Data-Word
MSB
Command Byte 0
RDAC
C3
C2
C1
C0
EEMEM
C3
C2
C1
C0
Command instruction codes are defined in Table 7.
Table 7. Command Operation Truth Table
Command Byte 0
B23
Command
Number
C3
C2
C1
0
0
0
0
1
0
0
0
2
0
0
1
4
3
0
0
1
5
4
0
1
0
5
5
0
1
0
5
6
0
1
1
5
7
0
1
1
8
1
0
0
9
1
0
0
10
1
0
1
11
1
0
1
5
12
1
1
0
5
13
1
1
0
5
14
1
1
1
5
15
1
1
1
1
The SDO output shifts out the last 24 bits of data clocked into the serial register for daisy-chain operation. Exception: for any instruction following Instruction 9 or 10,
the selected internal register data is present in Data Bytes 0 and 1. The instructions following Instructions 9 and 10 must also be a full 24-bit data-word to completely
clock out the contents of the serial register.
2
The RDAC register is a volatile scratchpad register that is refreshed at power-on from the corresponding nonvolatile EEMEM register.
3
Execution of these operations takes place when the CS strobe returns to logic high.
4
Instruction 3 writes two data bytes (16 bits of data) to EEMEM. In the case of Addresses 0 and 1, only the last 10 bits are valid for wiper position setting.
5
The increment, decrement, and shift instructions ignore the contents of the shift register Data Bytes 0 and 1.
Data Byte 1
0
0
0
A0
X
X
A3
A2
A1
A0
D15
D14
1, 2, 3
B16
C0
A3
A2
A1
A0
0
X
X
X
X
1
0
0
0
A0
0
0
0
0
A0
1
A3
A2
A1
A0
0
0
0
0
A0
1
X
X
X
X
0
0
0
0
A0
1
X
X
X
X
0
0
0
0
0
1
A3
A2
A1
A0
0
0
0
0
A0
1
0
0
0
A0
0
0
0
0
A0
1
X
X
X
X
0
0
0
0
A0
1
X
X
X
X
X
X
X
X
D13
D12
D11
D10
Data Byte 1
Data Byte 0
B15
B8
B7
X
...
D9
D8
D7
...
X
...
X
X
X
...
X
...
X
X
X
...
X
...
X
X
X
...
D15
...
D8
D7
...
X
...
X
X
X
...
X
...
X
X
X
...
X
...
X
X
X
...
X
...
X
X
X
...
X
...
X
X
X
...
X
...
X
X
X
...
X
...
X
X
X
...
X
...
D9
D8
D7
...
X
...
X
X
X
...
X
...
X
X
X
...
X
...
X
X
X
...
X
...
X
X
X
...
Rev. B | Page 17 of 28
Data Byte 0
D9
D8
D7
D6
D5
D4
D9
D8
D7
D6
D5
D4
B0
Operation
D0
X
NOP: Do nothing. See Table 16.
X
Restore EEMEM(A0) contents to RDAC(A0)
register. This command leaves the device in the
read program power state. To return the part to
the idle state, perform NOP instruction 0. See
Table 16.
X
Store Wiper Setting: Store RDAC(A0) setting to
EEMEM(A0). See Table 15.
D0
Store contents of Serial Register Data Bytes 0
and 1 (total 16 bits) to EEMEM(ADDR). See
Table 18.
X
Decrement 6 dB: Right-shift contents of
RDAC(A0) register, stop at all 0s.
X
Decrement all 6 dB: Right-shift contents of all
RDAC registers, stop at all 0s.
X
Decrement contents of RDAC(A0) by 1, stop at
all 0s.
X
Decrement contents of all RDAC registers by 1,
stop at all 0s.
X
Reset: Refresh all RDACs with their correspond-
ing EEMEM previously stored values.
X
Read contents of EEMEM (ADDR) from SDO
output in the next frame. See Table 19.
X
Read RDAC wiper setting from SDO output in
the next frame. See Table 20.
D0
Write contents of Serial Register Data Bytes 0
and 1 (total 10 bits) to RDAC(A0). See Table 14.
X
Increment 6 dB: Left-shift contents of
RDAC(A0), stop at all 1s. See Table 17.
X
Increment all 6 dB: Left-shift contents of all
RDAC registers, stop at all 1s.
X
Increment contents of RDAC(A0) by 1, stop at
all 1s. See Table 15.
X
Increment contents of all RDAC registers by 1,
stop at all 1s.
AD5235
LSB
D3
D2
D1
D0
D3
D2
D1
D0
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