Test Circuits - Analog Devices AD5235 Manual

Nonvolatile memory, dual 1024-position digital potentiometer
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AD5235
5V/DIV
5V/DIV
5V/DIV
* SUPPLY CURRENT RETURNS TO MINIMUM POWER
CONSUMPTION, IF INSTRUCTION 0 (NOP) IS EXECUTED
IIMMEDIATELY AFTER INSTRUCTION 1 (READ EEMEM).
Figure 23. I
vs. Time when Restoring Data from EEMEM
DD

TEST CIRCUITS

Figure 25 to Figure 35 define the test conditions used in the Specifications section.
NC
DUT
A
W
B
NC = NO CONNECT
Figure 25. Resistor Position Nonlinearity Error
(Rheostat Operation; R-INL, R-DNL)
DUT
A
W
V+
B
Figure 26. Potentiometer Divider Nonlinearity Error
DUT
A
V
W
W
V
MS2
B
Figure 27. Wiper Resistance
CS
CLK
SDI
I
DD
2mA/DIV
4ms/DIV
I
W
V
MS
V+ = V
DD
N
1LSB = V+/2
V
MS
(INL, DNL)
I
= V
/R
W
DD
NOMINAL
[
]
R
V
– V
/ I
W =
V
MS1
MS2
W
MS1
100
10
1
0.1
*
0.01
0
128
V
~
V+
OFFSET
OFFSET
GND
Rev. B | Page 12 of 28
R
= 25kΩ
AB
R
= 250kΩ
AB
256
384
512
640
CODE (Decimal)
Figure 24. I
vs. Code
WB_MAX
V
A
V+ = V
DD
A
PSRR (dB) = 20 LOG
DD
W
B
PSS (%/%) =
V
MS
Figure 28. Power Supply Sensitivity
(PSS, PSRR)
A
DUT
B
5V
W
V
IN
OP279
GND
OFFSET BIAS
Figure 29. Inverting Gain
5V
OP279
V
IN
W
A
DUT
B
OFFSET BIAS
Figure 30. Noninverting Gain
V
= V
= OPEN
A
B
T
= 25°C
A
768
896
1024
±10%
)
(
V
MS
∆V
DD
∆V
MS %
∆V
DD %
V
OUT
V
OUT

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