Rdac Circuit Simulation Model; Updated Outline Dimensions - Analog Devices AD5235 Manual

R
A B
W
–
AD8601
+
V
i
Figure 61. Nonlinear Gain Control with Tracking Resistance Tolerance

RDAC CIRCUIT SIMULATION MODEL

The internal parasitic capacitances and the external capacitive
loads dominate the ac characteristics of the RDACs. Configured
as a potentiometer divider, the −3 dB bandwidth of the AD5235
(25 kΩ resistor) measures 125 kHz at half-scale. Figure 14
provides the large signal BODE plot characteristics of the two
available resistor versions, 25 kΩ and 250 kΩ. A parasitic
simulation model is shown in Figure 62.
C1
V
O
U1
and Drift
Figure 62. RDAC Circuit Simulation Model (RDAC = 25 kΩ)
The following code provides a macro model net list for the
25 kΩ RDAC:
.PARAM D = 1024, RDAC = 25E3
*
.SUBCKT DPOT (A, W, B)
*
CA A 0
RWA A W
CW W 0
RWB W B
CB B 0
*
.ENDS DPOT
Rev. B | Page 27 of 28
RDAC
25k Ω
A B
C C
A B
11pF 11pF
80pF
W
11E-12
{(1-D/1024)* RDAC + 50}
80E-12
{D/1024 * RDAC + 50}
11E-12
AD5235