Rtc - Real Time Counter; Spi - Serial Peripheral Interface - Globalstar ST150M User Manual

Hide thumbs Also See for ST150M:
Table of Contents

Advertisement

9150-0125-01 R-1
SAMPLEPER can be then changed upon receiving the STOPPED event, and QDEC can be restarted using the START task.
Failing to do so may result in unpredictable behavior.
SYMBOL
Tsample
Time between sampling signals from quadrature decoder
Tled
Time from LED is turned on to signals are sampled

4.2.7 RTC - REAL TIME COUNTER

The Real-time counter (RTC) module provides a generic, low power timer on the low-frequency clock source (LFCLK).
The RTC module features a 24-bit COUNTER, a 12-bit (1/X) prescaler, capture/compare registers, and a tick event generator for
low power, tickless RTOS implementation. The RTC will run off the LFCLK. The COUNTER resolution will therefore be 30.517μs.
Depending on the source, the RTC is able to run while the HFCLK is OFF and PCLK16M is not available. The software has to
explicitly start LFCLK before using the RTC.
Counter increment frequency: fRTC [kHz] = 32.768 / (PRESCALER + 1
The PRESCALER register is read/write when the RTC is stopped. The PRESCALER register is read-only once the RTC is
STARTed. Writing to the PRESCALER register when the RTC is started has no effect.
The PRESCALER is restarted on START, CLEAR and TRIGOVRFLW, that is, the prescaler value is latched to an internal register
(<<PRESC>>) on these tasks.
Examples:
1. Desired COUNTER frequency 100 Hz (10 ms counter period)
PRESCALER = round(32.768 kHz / 100 Hz) - 1 = 327 fRTC = 99.9 Hz
10009.576 μs counter period
2. Desired COUNTER frequency 8 Hz (125 ms counter period)
PRESCALER = round(32.768 kHz / 8 Hz) – 1 = 4095 fRTC = 8 Hz
125 ms counter period

4.2.8 SPI - SERIAL PERIPHERAL INTERFACE

The SPI master provides a simple CPU interface which includes a TXD register for sending data and an RXD register for
receiving data. There are up to four SPI master/ three SPI slave with EasyDMA on the Nordic processor.
The SPI master does not implement support for chip select directly. Therefore, the CPU must use available GPIOs to select the
correct slave and control this independently of the SPI master. The SPI master supports SPI modes 0 through 3.
MODE
Mode
SPI_MODE0
SPI_MODE2
SPI_MODE3
ST150M User Manual
DESCRIPTION
CLOCK POLARITY
0(Leading)
0(Leading)
1(Trailing)
1(Trailing)
Confidential & Proprietary Information
MIN
TYP
MAX
128
131072
0
511
CLOCK PHASE
0(Active High)
1(Active Low)
0(Active High)
1(Active Low)
UNITS
usec
usec
13

Advertisement

Table of Contents
loading

Table of Contents