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CHAPTER 4 DIFFERENCES BETWEEN TARGET DEVICES AND TARGET INTERFACE CIRCUITS
This chapter describes differences between the target device's signal lines and the signal lines of the IE system
target interface circuit.
The target interface circuit of the IE system realizes emulation through an emulation circuit configuration
comprising the emulation CPU, TTL, CMOS-IC, etc. The protective circuit makes the electrical specifications of the
IE system different from those of the target device.
(1) Signals input to or output from the EVA chip and the peripheral EVA chip
(2) Signals input from the target system via a gate
(3) Other signals
The following shows the circuit of the IE-789835-NS-EM1 for the signals in (1) to (3) above. The same applies to
alternate pins for which no circuit is provided in the IE system.
(1) Signals input to or output from the emulation CPU
The following signals perform the same operations as in the µ PD789835 Subseries. However, a 1 MΩ pull-down
resistor and 100 Ω resistor are inserted in series. Refer to Figure 4-1 Equivalent Circuit of Emulation Circuit
1.
1 MΩ pull-down resistors are connected to the signals related to port 0 and port 1 inside the IE-78K0S or IE-
78K0S-NS-A.
• Signals related to port 0
When used as pins for detecting key returns, port 0 is pulled up using HC4066 in the IE-789835-NS-EM1.
• Signals related to port 1
• Signals related to port 2
• Signals related to port 3
• Signals related to port 6
• Signals related to port 8
• Signals related to LCD
V
to V
and CAP0 to CAP3 are connected to the emulation circuit by switching slide SW. A Zener diode of 7
LC0
LC4
V is connected between V
36
and GND to protect the pins.
LC0
User's Manual U16290EJ1V0UM
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