Sony/Philips Digital Interface; Ethernet - Boardcon Embedded Design PICO-IMX8M-MINI Reference User Manual

SAI5_TXD0 SAI5 Transmit data0
SAI5_TXD1 SAI5 Transmit data1
SAI5_TXD2 SAI5 Transmit data2
SAI5_TXD3 SAI5 Transmit data3
SAI5_TXC SAI5 Transmit bit clock
SAI5_TXFS SAI5 Transmit frame sync
SAI5_MCLK SAI5 main clock

2.3.2 Sony/Philips Digital Interface

S/PDIF input and output, including a new Raw Capture input mode.
Signal Description
SPDIF_RX SPDIF input data
SPDIF_TX SPDIF output data
SPDIF_EXT_CLK External clock signal

2.4 Ethernet

The Ethernet Media Access Controller (MAC) is designed to support 10/100/1000 Mbps Ethernet/IEEE
802.3 networks. Used PHY chip RTL8211E-VB-CG,
Features
1000Base-T IEEE 802.3ab Compliant
⚫
1000Base-TX IEEE 802.3u Compliant
⚫
Supports RGMII
⚫
Crossover Detection & Auto-Correction
⚫
Signal Description
ENET_RD0 Ethernet MAC Receive data0
ENET_RD1 Ethernet MAC Receive data1
ENET_RD2 Ethernet MAC Receive data2
ENET_RD3 Ethernet MAC Receive data3
ENET_RXC Ethernet MAC Receive clock
ENET_RX_CTL Ethernet MAC Receive enable control
ENET_TD0 Ethernet MAC Transmit data0
ENET_TD1 Ethernet MAC Transmit data1
ENET_TD2 Ethernet MAC Transmit data2
ENET_TD3 Ethernet MAC Transmit data3
ENET_TXC Ethernet MAC Transmit clock
Customize the embedded system based on
182
198
200
196
Defaults Function
Pin
73 ENET_RD0
74 ENET_RD1
76 ENET_RD2
78 ENET_RD3
71 ENET_RXC
70 ENET_RX_CTL
66 ENET_TD0
67 ENET_TD1
68 ENET_TD2
69 ENET_TD3
63 ENET_TXC
18
Your Idea
34 SAI1_TXD0
54 PDM_DATA3
33 SAI1_TXD1
32 SAI1_TXD2
31 SAI1_TXD3
36 SAI1_TXC
52 PDM_DATA2
38 SAI1_TXFS
55 PDM_DATA1
53 SAI5_MCLK
60 SAI1_MCLK
SAI3_MCLK
Pin Defaults Function
SPDIF_RX
SPDIF_TX
SPDIF_EXT_CLK