Support up to 4 data lanes
⚫
Support 80Mbps - 1.5Gbps data rate in high speed operation
⚫
MIPI CSI signals
Signal
Description
CSI_DP0
MIPI-CSI data0 diff-pair Positive
CSI_DN0
MIPI-CSI data0 diff-pair Negative
CSI_DP1
MIPI-CSI data1 diff-pair Positive
CSI_DN1
MIPI-CSI data1 diff-pair Negative
CSI_DP2
MIPI-CSI data2 diff-pair Positive
CSI_DN2
MIPI-CSI data2 diff-pair Negative
CSI_DP3
MIPI-CSI data3 diff-pair Positive
CSI_DN3
MIPI-CSI data3 diff-pair Negative
CSI_CKP
MIPI-CSI clock diff-pair Positive
CSI_CKN
MIPI-CSI clock diff-pair Negative
2.3 Audio
2.3.1 Digital Interface (SAI)
Five synchronous audio interface (SAI) modules supporting I2S, AC97, TDM, codec/DSP, and DSD
interfaces, including one SAI with 8 Tx and 8 Rx lanes, one SAI with 4 Tx and 4 Rx lanes, two SAI with 2
Tx and 2 Rx lanes, and one SAI with 1 Tx and 1Rx lane. Support over 20 channels of audio subject to I/O
limitations. 8-Channel Pulse Density Modulation (PDM) input.
Signal
Description
SAI1_RXD0
SAI1 Receive data0
SAI1_RXD1
SAI1 Receive data1
SAI1_RXD2
SAI1 Receive data2
SAI1_RXD3
SAI1 Receive data3
SAI1_RXD4
SAI1 Receive data4
SAI1_RXD5
SAI1 Receive data5
SAI1_RXD6
SAI1 Receive data6
SAI1_RXD7
SAI1 Receive data7
SAI1_RXC
SAI1 Receive bit clock
SAI1_RXFS
Receive frame sync
SAI1_TXD0
SAI1 Transmit data0
SAI1_TXD1
SAI1 Transmit data1
SAI1_TXD2
SAI1 Transmit data2
Customize the embedded system based on
Defaults Function
Pin
133
CSI_DP0
135
CSI_DN0
127
CSI_DP1
129
CSI_DN1
115
CSI_DP2
117
CSI_DN2
109
CSI_DP3
111
CSI_DN3
121
CSI_CKP
123
CSI_CKN
16
Your Idea
Pin
Defaults Function
48
SAI1_RXD0
47
SAI1_RXD1
46
SAI1_RXD2
45
SAI1_RXD3
44
SAI1_RXD4
43
SAI1_RXD5
42
SAI1_RXD6
41
SAI1_RXD7
37
SAI1_RXC
39
SAI1_RXFS
43
SAI1_RXD5
34
SAI1_TXD0
49
SAI5_RXFS
33
SAI1_TXD1
51
PDM_CLK
32
SAI1_TXD2
58
PDM_DATA0
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