Analog Devices Linear Technology LTM8026 Manual page 16

LTM8026
APPLICATIONS INFORMATION
down switching for 13µs. The regulated output voltage
must be greater than 1.21V and is set by the equation:
11.9
R = kΩ
ADJ
V – 1.19
OUT
where R is shown in Figure 3.
ADJ
V
LTM8026
Figure 3. Voltage Regulation and Overvoltage Protection
Feedback Connections
Thermal Shutdown
If the part is too hot, the LTM8026 engages its thermal
shutdown, terminates switching and discharges the soft-
start capacitor. When the part has cooled, the part automati-
cally restarts. This thermal shutdown is set to engage at
temperatures above the 125°C absolute maximum internal
operating rating to ensure that it does not interfere with
functionality in the specified operating range. This means
that internal temperatures will exceed the 125°C absolute
maximum rating when the overtemperature protection is
active, possibly impairing the device's reliability.
Shutdown and UVLO
The LTM8026 has an internal UVLO that terminates switch-
ing, resets all logic, and discharges the soft-start capacitor
when the input voltage is below 6V. The LTM8026 also has
a precision RUN function that enables switching when the
voltage at the RUN pin rises to 1.68V and shuts down the
LTM8026 when the RUN pin voltage falls to 1.55V. There
is also an internal current source that provides 5.5μA of
pull-down current to program additional UVLO hysteresis.
For RUN rising, the current source is sinking 5.5µA until
RUN = 1.68V, after which it turns off. For RUN falling, the
current source is off until the RUN = 1.55V, after which it
sinks 5.5µA. The following equations determine the voltage
16
V
OUT OUT
ADJ
R
ADJ
8026 F03
For more information
divider resistors for programming the falling UVLO voltage
and rising enable voltage (V
1.55 • R2
R1=
UVLO – 1.55
V – 1.084 • UVLO
ENA
R2 =
5.5µA
The RUN pin has an absolute maximum voltage of 6V.
To accommodate the largest range of applications, there
is an internal Zener diode that clamps this pin, so that it
can be pulled up to a voltage higher than 6V through a
resistor that limits the current to less than 100µA. For
applications where the supply range is greater than 4:1,
size R2 greater than 375k.
LTM8026
Figure 4. UVLO Configuration
Load Sharing
Two or more LTM8026s may be paralleled to produce
higher currents. To do this, simply tie V
and ADJ together. The value of the ADJ resistor is given
by the equation:
11.9
R =
ADJ
(
n V – 1.19
OUT
where n is the number of LTM8026s in parallel. Given the
LTM8026's accurate current limit and CVCC operation,
each paralleled unit will contribute a portion of the output
current, up to the amount determined by the CTL_I and
CTL_T pins. An example of this is given in the Typical
Applications section.
Two or more LTM8026s can share load current equally by
using a simple op amp circuit to simultaneously modulate
the CTL_I pins. Tie SS, RUN, and V
of the paralleled LTM8026s together. An example of two
www.linear.com/LTM8026
) as configured in Figure 4.
ENA
V
V
IN
IN
R2
RUN
R1
8026 F04
, SS, RUN
OUT
kΩ
)
and CTL_I of all
OUT
8026fd