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5
SII9021CTU (OBE MAIN ASSY : IC6404)
• HDMI Rx
Pin Arrangement (Top view)
DGND
DVCC18
IOGND
IOVCC
MUTEOUT
SPDIF
CVCC18
CGND
RSVD
RSVD
RSVD
SD0
WS
SCK
MCLKIN
MCLKOUT
IOVCC
IOGND
CGND
CVCC18
NC
AUDPVCC18
AUDPGND
XTALOUT
XTALIN
XTALVCC
REGVCC
NC
RSVDL
RESET#
SCDT
INT
CVCC18
CGND
CLK48B
IOGND
Block Diagram
DSDA0
31
DSCL0
32
Port
MUX
DSDA1
29
DSCL1
30
R1XC±
58, 59
Panel Link
R1X0±
62, 63
TMDS
Digital
R1X1±
67, 68
Core
R1X2±
70, 71
R0XC±
39, 40
Panel Link
R0X0±
43, 44
TMDS
Digital
R0X1±
47, 48
Core
R0X2±
51, 52
R0PWR5V
34
R1PWR5V
33
5
6
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
2
I
C
Slave
HDCP Keys
EEPROM
24-Bit Data
HS, VS,
DE
HDCP
Decryption
Engine
XOR
Mask
24-Bit Encrypted
Port
Pixel Data
MUX
Control Signals
HS, VS,
DE
24-Bit Data
Port
Detect
PDP-436SXE
6
7
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
Registers
Configuration
2
I
C
Logic Block
Slave
Aux
MCLK
Data
Gen.
HDMI
Audio
Mode
Data
Control
Decode
24-Bit Decrypted
Pixel Data
10-Bit
30
Video
DAC
Video Color
Space
Converter
Up/Down
Sampling
24
Auto A/V
Exception
Handling
7
8
DGND
DVCC18
R0PWR5V
R1PWR5V
DSCL0
DSDA0
DSCL1
DSDA1
CSCL
CSDA
IOVCC
IOGND
CGND
CVCC18
DACDVCC18
DACDGND
AnBPb
DACVCCB
DACGNDB
AnGY
DACVCCG
DACGNDG
AnRPr
DACVCCR
DACGNDR
COMP
RSET
VREF
DACAGND
DACAVCC
DACOVCC
IOVCC
IOGND
VSYNC
HSYNC
DE
102 RESET#
104 INT
27 CSDA
28 CSCL
87 MCLKIN
88 MCLKOUT
97 XTALIN
96 XTALOUT
86 SCK
85 WS
84 SD0
78 SPDIF
11 COMP
10 RSET
17 AnGY
14 AnRPr
20 AnBPb
1
DE
2
HSYNC
3
VSYNC
121 ODCK
144-140, 137, 136, 133-129,
Q [23:0]
126-123, 119-116, 113-110
107 CLK48B
77 MUTEOUT
103 SCDT
8
A
B
C
D
E
F
155
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