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ACROMAG INCORPORATED Tel: (248) 295-0310 30765 South Wixom Road Fax: (248) 624-9234 P.O. BOX 437 Wixom, MI 48393-7037 U.S.A. solutions@acromag.com Copyright 2009-2011, Acromag, Inc., Printed in the USA. Data and specifications are subject to change without notice. 8500-852-B11C007...
The information contained in this manual is subject to change IMPORTANT SAFETY CONSIDERATIONS without notice. Acromag, Inc. makes no warranty of any kind with regard to this material, including, but not limited to, the implied It is very important for the user to consider the possible adverse warranties of merchantability and fitness for a particular purpose.
For repairs to a product damaged in shipment, refer to the communication link fault isolation are included. Break, Acromag Service Policy to obtain return instructions. It is parity, overrun, and framing error simulation are also suggested that salvageable shipping cartons and packing possible.
SERIES IOS-521 I/O SERVER MODULE EIA/TIA-422B SERIAL COMMUNICATION MODULE __________________________________________________________________________________________ P2 pin assignments are unique to each IOS model (see inserted in a backplane. As such, be careful not to attach signal Table 2.1) and normally correspond to the pin numbers of the ground to safety ground via any device connected to these ports, field I/O interface connector on the carrier board (you should or a ground loop will be produced, and this may adversely affect...
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SERIES IOS-521 I/O SERVER MODULE EIA/TIA-422B SERIAL COMMUNICATION MODULE __________________________________________________________________________________________ The IOS-521 is an eight port RS422 module. Memory map Base Base Addr+ Addr+ Table 3.1 lists the addresses and registers corresponding to Port A. Detailed register maps for Ports B to H are not given. Since R/W - SCR Not Driven Port A Scratch...
14.7456MHz crystal on the circuit board to obtain unique clock within 3.125% of the actual center (providing an error margin of rates. You may contact Acromag Applications Engineering to 46.875%). Thus, the start bit can begin as much as one 16x explore options in this area.
SERIES IOS-521 I/O SERVER MODULE EIA/TIA-422B SERIAL COMMUNICATION MODULE __________________________________________________________________________________________ following the start bit. As such, if the data on RxD is a IER BIT INTERRUPT ACTION symmetrical square wave, the center of each successive data cell be disabled. will occur within 3.125% of the actual center (this is 50% providing an error margin of 46.875%).
SERIES IOS-521 I/O SERVER MODULE EIA/TIA-422B SERIAL COMMUNICATION MODULE __________________________________________________________________________________________ FCR - FIFO Control Register, Ports A-H (WRITE Only) Line Control Register LCR Bit FUNCTION PROGRAMMING This write-only register is used to enable and clear the FIFO Word 0 0 = 5 Data Bits 0 1 = 6 Data Bits buffers, set the transmit/receive FIFO trigger levels, and select Length Sel.
SERIES IOS-521 I/O SERVER MODULE EIA/TIA-422B SERIAL COMMUNICATION MODULE __________________________________________________________________________________________ signal. The four modem control inputs (CTS, DSR, DCD, and RI) EFR bit 4 is cleared, preventing existing software from are disconnected from their receiver input paths. In addition, the inadvertently overwriting the extended functions.
SERIES IOS-521 I/O SERVER MODULE EIA/TIA-422B SERIAL COMMUNICATION MODULE __________________________________________________________________________________________ Line Status Register...continued LSR - Line Status Register, Ports A-H (Read/Write-Restricted) LSR Bit FUNCTION PROGRAMMING Break 0 = No Break The Line Status Register (LSR) provides status indication Interrupt 1 = Break the received data input has (BI) been held in the space (logic 0) state corresponding to the data transfer.
SERIES IOS-521 I/O SERVER MODULE EIA/TIA-422B SERIAL COMMUNICATION MODULE __________________________________________________________________________________________ MSR - Modem Status Register, Ports A-H (Read/Write) The Enhanced Register Set includes the following registers. Enhanced Feature Register (EFR) The Modem Status Register (MSR) provides the host CPU Xon-1, Xon-2 with an indication on the status of the modem input line from a Xoff-1, Xoff-2 modem or other peripheral device.
When automatic hardware flow control is enabled, an interrupt will be generated when the receive FIFO is filled to Acromag ID Code the program trigger level and IOS Model Code RTS will go to a logic “1” at the Not Used next trigger level.
SERIES IOS-521 I/O SERVER MODULE EIA/TIA-422B SERIAL COMMUNICATION MODULE __________________________________________________________________________________________ SIGNALS (INTERNAL & EXTERNAL): Reset High FIFO Polled-Mode Interrupt Read LSR/ (RCVR errors) Reset Resetting all Interrupt Enable Register (IER) bits to 0, with Interrupt Read RCVR FIFO Control Register (FCR) Bit 0 =1, puts the channel into the (RCVR data Buffer polled-mode of operation.
SERIES IOS-521 I/O SERVER MODULE EIA/TIA-422B SERIAL COMMUNICATION MODULE __________________________________________________________________________________________ the Interrupt Status Register (ISR) is read. One to 128 serviced. This is useful in preventing continuous interrupts on characters can be written to the transmit FIFO when servicing one channel from freezing out interrupt service for other this interrupt.
SERIES IOS-521 I/O SERVER MODULE EIA/TIA-422B SERIAL COMMUNICATION MODULE __________________________________________________________________________________________ stack it into the data buffer or FIFO and these conditions are 8. Write 0AH to the Modem Control Register (MCR). configured via bits 0-3 of the Enhanced Feature Register (EFR). This enables interrupts and sets the Ready-To-Send bit and Programming Example asserts the RTS* signal line.
8 data bits, and 1 stop bit, with no parity. The following table (see RS422/RS485 INTERFACE DIAGRAM). However, for true summarizes the available data formats: half-duplex EIA-485 operation, please see the Acromag Model IOS-502. Binary 0 (a shift from “Mark” to “Space”)
It is highly recommended that a non-functioning level) may contain more than one bit (as is the case with most board be returned to Acromag for repair. The board can be easily phone modems). While bits-per-second (bps) refers to the actual damaged unless special SMT repair and service tools are used.
SERIES IOS-521 I/O SERVER MODULE EIA/TIA-422B SERIAL COMMUNICATION MODULE __________________________________________________________________________________________ 6.0 SPECIFICATIONS RS422/RS485 PORTS Channel Configuration……..…. Eight independent, non-isolated PHYSICAL Physical Configuration…….…... Single I/O Server Module EIA/TIA-422B serial ports with a Length........ 4.030 in. (102.36 mm). common signal return Width........1.930 in. (49.02 mm). connection.
RS- 422/485 RS- 422B DRIVERS & INTERFACE RECEIVERS RxD+ LOGIC NOTE: TERMINATION RESISTOR ( RT) AND INTERFACE RxD- BIAS RESISTOR (RB) SIPS ARE MOUNTED IN SOCKETS AND MAY BE REMOVED IF REQUIRED DATA BUS TxD+ ADDRESS BUS TxD- PORTS B to G CONTROL BUS RxD+ PORT I/O...
IOS-521 TERMINATION AND BIAS SIP RESISTOR LOCATION DRAWING RESISTOR IDENTIFICATION FOR REMOVAL AND REPLACEMENT WHERE REQUIRED VALUE FUNCTIO N PO RT R23:A 120 O HM Tx D-A TERMINATIO N PO RT A R23:B 120 O HM Rx D-A TERMINATIO N PO RT A R23:C 120 O HM...
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