ISL78420EVAL1Z
Evaluation Board User Guide
Description
The ISL78420EVAL1Z evaluation board is designed for a user to
evaluate the ISL78420 100V 2A half-bridge driver with tri-level
PWM input for driving the gates of two NMOS FETs in a
half-bridge configuration. These NFET MOSFETs are included on
the evaluation board to evaluate a half-bridge driven load such
as a DC motor or a synchronous switching regulator.
The ISL78420 is offered in a 14 Ld HTSSOP package
enhanced with a thermal EPAD. It operates from a supply
voltage of 8V to 14V DC with the capability of driving a high-
side NMOS FET in a 100V half-bridge configuration. A unique
tri-level PWM input allows control of both the high and low-side
gate driver with a single input. When the PWM pin is left in a
floating high impedance state both gate drivers are turned off,
which is beneficial for multiphase DC/DC switching that
requires phase shedding.
Specifications
This board is optimized for the following operating conditions:
• VDD supply: 8V to 14V
• PWM switching frequency: 10kHz to 1MHz
• Preset half-bridge dead time: 35ns
• Peak gate drive current: 2A source and sink
• Half-bridge voltage: Up to 100V
UG006 Rev 0.00
October 15, 2014
Key Features
• 2A source and sink NMOS gate drivers
• Internal level shifter and bootstrap diode for gate driver on
• Up to 100V high-side gate drive reference
• 8V to 14V bias supply operation
• Single PWM input for high-side and low-side gate driver with
• Single resistor adjustable dead time from 35ns to 220ns
Reference Documents
•
•
• AN1727, "ISL78225EVAL1Z: 4-Phase Interleaved
Ordering Information
ISL78420EVAL1Z
FIGURE 1. ISL78420EVAL1Z EVALUATION BOARD
USER'S MANUAL
high-side FET
tri-level for turning off both drivers
ISL78420
datasheet
ISL78225
datasheet
Synchronous Boost Converter"
PART NUMBER
Evaluation Board, 100V 2A Half-Bridge
Driver with Tri-Level Input
UG006
Rev 0.00
October 15, 2014
DESCRIPTION
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