32-bit arm cortex-m4/m0+ mcu; 192 kb sram; 256 kb flash, crystal-less usb operation, dmic subsystem, flexcomm
interface, 32-bit counter/ timers, sctimer/pwm, 12-bit 5.0 msamples/sec adc, temperature sensor (105 pages)
Summary of Contents for NXP Semiconductors ADC1610S Series
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Quick start ADC1610S series Quick start ADC1610S series Quick start ADC1610S series (F1 or F2 versions) (F1 or F2 versions) Demonstration board for ADC1610S series Demonstration board for ADC1610S series Rev. 5 — January 2011 January 2011 Quick start Document information...
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NXP Semiconductors Quick start ADC1610S series (F1 or F2 versions) Quick start Revision history Date Description 20081001 Initial version. 20090518 Update 20090610 Add SPI software description. 20100519 Add HSDC extension module acquisition system description. 20110120 Update with latest software tool.
Overview of the ADC1610S demo board 1.1 ADC1610S F1 series (CMOS digital outputs) Figure below presents the connections to measure ADC1610S. USB SPI DC adaptor Register connected to programming mains LOGIC ANALYZER Output data . DO (LSB) to Dxx (MSB) . DAV for synchro .
1.2 ADC1610S F2 series (LVDS/DDR digital outputs) series (LVDS/DDR digital outputs) Figure below presents the connections to measure ADC nnections to measure ADC1610S. USB SPI DC adaptor Register connected to programming programming mains EXTENTION EXTENTION MODULE MODULE Data Acquisition Data Acquisition Optional module + Optional module + bridge...
NXP Semiconductors Quick start ADC1610S series (F1 or F2 versions) Quick start ADC1610S series (F1 or F2 versions) Quick start 1.3 Power supply The board is powered either with a 3 V The board is powered either with a 3 V and 1.8/3 V...
NXP Semiconductors Quick start ADC1610S series (F1 or F2 versions) Quick start Table 2. Input signals Name Function View 50Ω IN connector – Analog input signal ( matching) 50Ω CLKP connector – Single ended clock input signal ( matching), with a transformer.
NXP Semiconductors Quick start ADC1610S series (F1 or F2 versions) Quick start 1.6 Output signals in LVDS DDR version The digital output signal is available in binary, 2’s complement or gray format. A Data Valid Output clock (DAV) is provided by the device for the data acquisition.
NXP Semiconductors Quick start ADC1610S series (F1 or F2 versions) Quick start 1.7 SPI Mode The ADC1610S can be controlled either by a Serial Peripheral Interface (SPI) or by PIN. Table 5. SPI Interface Name Function View USB connector – SPI interface 1.8 SPI program...
2. HSDC extension module: acquisition board figure 4 shows an overview of the extension module HSDC-EXTMOD01/DB acquisition board: +5V P OWER SUPPLY RED LED FOR RED LED FOR POWER . I = 3.2 A +3V3 POWER SUPPLY CONNECTION UMPER FOR SUPPLY .
NXP Semiconductors Quick start ADC1610S series (F1 or F2 versions) Quick start The HSDC extension module is intended for acquisition/generation and clock generation purpose. When connected to an ADC demo-board it is intended as an acquisition system for digital output bits delivered by ADC, either CMOS (HE14 P1 connector) or LVDS DDR (SAMTEC QTH_060_02 P2 connector).
3. Combo 1610S and HSDC extension module 3.1 ADC1610S setup CMOS outputs figure 24 below shows an overview of the whole system ADC1610S+HSDC extension module with CMOS outputs configuration for which connection is straightforward, together with a supply extension module (release A) for the ADC1610S demo-board: POWER SUPPLY USB SPI .
3.2 ADC1610S setup LVDS/DDR outputs figure 24 below shows an overview of the whole system ADC1610S+HSDC extension module with CMOS outputs configuration for which connection is straightforward, together with a supply extension module (release A) for the ADC1610S demo-board: USB SPI POWER SUPPLY USB SPI MODULE...
NXP Semiconductors Quick start ADC1610S series (F1 or F2 versions) Quick start 3.3 ADC Software tool Run the application “SW_ADC_1_r02.exe”. This application will allow: • the user to control features on our high speed ADC through the SPI interface available on any ADC1610S series;...
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NXP Semiconductors Quick start ADC1610S series (F1 or F2 versions) Quick start Fig 8. SW_ADC_1_r02: “Info” page The HSDC-EXTMOD is not yet initialized, so the embedded PLL (LMK03001 in this example) is not locked. Initialization is only required for acquisition purpose.
Quick start 3.3.1 ADC SPI programming Functional Registers page The page displays all SPI registers for ADC1610S series: Fig 9. SW_ADC_1_r02: “ADC - Functional Registers” page Perform any settings and then click on the “Send data to device” button to update the device registers.
NXP Semiconductors Quick start ADC1610S series (F1 or F2 versions) Quick start 3.3.2 ADC SPI programming Read Registers page This page can be used to read all registers by clicking on the “Read all registers” button and will display the result in the table below: Fig 10.
NXP Semiconductors Quick start ADC1610S series (F1 or F2 versions) Quick start Column 1 Column 2 Note that all data are saved in hexadecimal format. Click on the “Save registers read to file” button to select the file to store data to. Make sure that you store your file with “.txt”...
NXP Semiconductors Quick start ADC1610S series (F1 or F2 versions) Quick start 3.3.4 Tools page This page allows the user to calculate the coherent frequencies values involved of the acquisition process. It gives an indication where the 6 first harmonics are located in the Nyquist zone.
NXP Semiconductors Quick start ADC1610S series (F1 or F2 versions) Quick start 3.3.5 Acquisition page This page will acquire data to evaluate the high dynamic performance of the device: Fig 13. SW_ADC_1_r02: “Acquisition” page Before proceeding to any acquisition, the user needs to do the following entries: •...
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NXP Semiconductors Quick start ADC1610S series (F1 or F2 versions) Quick start Table 7. Dynamic results as stored in a text file Content of file is shown as table format Name ENOB SINAD_C SNR_C SNR_FS SFDR_C SFDR_FS (MHz) (MHz) (dBFS)
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NXP Semiconductors Quick start ADC1610S series (F1 or F2 versions) Quick start 3.3.5.2 Reorganized signal The reorganized signal displays the reconstructed sine wave from coherency calculation corresponding to 1 period of the input signal: Fig 15. SW_ADC_1_r02: “Acquisition” page, reorganized signal graph Press the “Autoscale”...
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NXP Semiconductors Quick start ADC1610S series (F1 or F2 versions) Quick start 3.3.5.3 Unreconstructed signal The unreconstructed signal displays the unreconstructed sine wave corresponding to the whole number of period being acquired following the coherency rule: Zoom tool Fig 16. SW_ADC_1_r02: “Acquisition” page, unreconstructed signal graph Press the “Autoscale”...
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NXP Semiconductors Quick start ADC1610S series (F1 or F2 versions) Quick start 3.3.5.4 Histogram The histogram graph shows the distribution of output codes. This graph shows which code is present and if there is any missing code in the conversion range: Fig 17.
NXP Semiconductors Quick start ADC1610S series (F1 or F2 versions) Quick start 3.3.6 Info page This page will give practical information related to software and hardware settings: Fig 18. SW_ADC_1_r02: “Info” page The information visible on this page is: • board serial number •...
NXP Semiconductors Quick start ADC1610S series (F1 or F2 versions) Quick start Appendix A.1: coherency calculation The coherency relies on the fact that clock and analog input signal are synchronized and the first and last samples being captured are adjoining samples: it ensures a continuous digitized time process for the FFT processing.
NXP Semiconductors Quick start ADC1610S series (F1 or F2 versions) Quick start 6. Contents Overview of the ADC1610S demo board ......................... 3 ADC1610S F1 series (CMOS digital outputs) ......................3 ADC1610S F2 series (LVDS/DDR digital outputs) ....................4 Power supply ................................5 Input signals (IN, CLK) .............................
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