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r e s t r i c t e d
AN408
A Design Guide to SPI F-RAM™ Processor
Companion - FM33256B
About this document
Scope and purpose
AN408 provides an overview and design guidelines for the SPI F-RAM real-time clock (RTC) Processor
Companion part - FM33256B. This document also includes a typical application and an example code. For
information on the basic SPI operation, refer to the application note
Intended audience
It is intended for the users of SPI F-RAM
Table of contents
About this document ....................................................................................................................... 1
Table of contents ............................................................................................................................ 1
1
Introduction .......................................................................................................................... 2
2
Two Logical Devices in One ...................................................................................................... 3
3
Typical Application ................................................................................................................. 4
4
Processor Companion Features ............................................................................................... 5
4.1
System Power-On Reset with RST pin .................................................................................................... 5
4.2
Early Power-Fail Warning ........................................................................................................................ 6
4.3
Event Counter .......................................................................................................................................... 6
4.4
Serial Number .......................................................................................................................................... 7
5
Real-Time Clock ..................................................................................................................... 8
5.1
Backup Power .......................................................................................................................................... 9
5.2
RTC Calibration........................................................................................................................................ 9
5.2.1
Setup Example ................................................................................................................................... 9
6
Power Cycle Considerations ................................................................................................... 10
7
Summary ............................................................................................................................. 11
8
Related Application Notes ...................................................................................................... 11
9
PSoC 3 User Module ............................................................................................................... 11
10
Pseudo Code Examples .......................................................................................................... 12
10.1
Enable RTC Oscillator ............................................................................................................................ 12
10.2
Set RTC Time/Date ................................................................................................................................ 13
10.3
Set VTP Voltage Detect Trip Point ......................................................................................................... 14
10.4
Read RTC Registers ................................................................................................................................ 14
10.5
Read Event Counters ............................................................................................................................. 15
10.6
SPI Processor Companion Write ........................................................................................................... 16
10.7
SPI Processor Companion Read ........................................................................................................... 17
Revision history............................................................................................................................. 18
Application Note
www.infineon.com
processor companion FM33256B.
TM
Please read the Important Notice and Warnings at the end of this document
AN304 - SPI Guide for F-RAM.
page 1 of 19
001-87564 Rev.*D
2021-06-01
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Table of Contents
Related Manuals for Infineon SPI F-RAM FM33256B
Summary of Contents for Infineon SPI F-RAM FM33256B
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Page 1: Table Of Contents
10.6 SPI Processor Companion Write ......................16 10.7 SPI Processor Companion Read ......................17 Revision history..........................18 Application Note Please read the Important Notice and Warnings at the end of this document 001-87564 Rev.*D www.infineon.com page 1 of 19 2021-06-01... -
Page 2: Introduction
r e s t r i c t e d A Design Guide to SPI F-RAM™ Processor Companion - FM33256B Introduction 1 Introduction The FM33256B is a 256-Kbit serial (SPI) F-RAM memory product, which offers an integrated processor companion and an RTC. The processor companion section includes a power-on system reset, low-voltage detect, a watchdog timer, an early power-fail warning, an event counter, automatic switchover to backup power, and a lockable 64-bit serial number. -
Page 3: Two Logical Devices In One
r e s t r i c t e d A Design Guide to SPI F-RAM™ Processor Companion - FM33256B Two Logical Devices in One 2 Two Logical Devices in One Even though FM33256B is a single device, it is internally organized as two logical devices as shown in Figure 1. -
Page 4: Typical Application
r e s t r i c t e d A Design Guide to SPI F-RAM™ Processor Companion - FM33256B Typical Application 3 Typical Application A typical application of FM33256B is shown in Figure 2. It is shown as an example with external components, their typical values, and connections to other system devices. -
Page 5: Processor Companion Features
r e s t r i c t e d A Design Guide to SPI F-RAM™ Processor Companion - FM33256B Processor Companion Features 4 Processor Companion Features The FM33256B device integrates all the necessary processor supervisor features that a designer may need. The companion features include: System Power-On Reset (POR) with RST ̅̅̅̅̅... -
Page 6: Early Power-Fail Warning
r e s t r i c t e d A Design Guide to SPI F-RAM™ Processor Companion - FM33256B Processor Companion Features forces a reset condition when the timer restart occurs too late (the programmed end time (register 0Ch) for the Watchdog Timer window is exceeded). -
Page 7: Serial Number
r e s t r i c t e d A Design Guide to SPI F-RAM™ Processor Companion - FM33256B Processor Companion Features Note: In polled mode, the CNT pin has an internal pull-up resistor and therefore no external pull-up is required. -
Page 8: Real-Time Clock
r e s t r i c t e d A Design Guide to SPI F-RAM™ Processor Companion - FM33256B Real-Time Clock Real-Time Clock A real-time clock (RTC) counts time in steps of seconds and can report time, day of the week, calendar day, week, and year. -
Page 9: Backup Power
r e s t r i c t e d A Design Guide to SPI F-RAM™ Processor Companion - FM33256B Real-Time Clock In the FM33256B, the RTC data may be read without interrupting the RTC operation. When the RTC is read by writing the ‘R’... -
Page 10: Power Cycle Considerations
r e s t r i c t e d A Design Guide to SPI F-RAM™ Processor Companion - FM33256B Power Cycle Considerations Set the Read (R bit in register 00h, bit 0) which takes a snapshot of the RTC registers (assumes R bit is •... -
Page 11: Summary
r e s t r i c t e d A Design Guide to SPI F-RAM™ Processor Companion - FM33256B Summary Summary This application note summarizes the features of the FM33256B device. This document also provides a typical application, design guidelines, and example pseudo codes for the FM33256B device. Related Application Notes AN407 - A Design Guide to I2C F-RAM Processor Companions –... -
Page 12: Pseudo Code Examples
r e s t r i c t e d A Design Guide to SPI F-RAM™ Processor Companion - FM33256B Pseudo Code Examples Pseudo Code Examples A summary of the op-codes of FM33256B is given in Table Table 1 Summary Table of Op-Codes Name Op-Code Address... -
Page 13: Set Rtc Time/Date
r e s t r i c t e d A Design Guide to SPI F-RAM™ Processor Companion - FM33256B Pseudo Code Examples 10.2 Set RTC Time/Date /************************* Set RTC time/date *******************************/ // Step #1 Set W bit which allows writes to RTC registers data[0] = 0x02;... -
Page 14: Set Vtp Voltage Detect Trip Point
r e s t r i c t e d A Design Guide to SPI F-RAM™ Processor Companion - FM33256B Pseudo Code Examples 10.3 Set VTP Voltage Detect Trip Point /****************** Set VTP Voltage Detect Trip Point **********************/ // From the factory, VTP bits are cleared to 0. If user wants to set trip point to // the higher setting, then write VTP bits to 11b in Reg 18h control register. -
Page 15: Read Event Counters
r e s t r i c t e d A Design Guide to SPI F-RAM™ Processor Companion - FM33256B Pseudo Code Examples 10.5 Read Event Counters /************************** Read Event Counters **************************/ // Step #1 Set RC bit which takes snapshot of both counter registers data[0] = 0x09;... -
Page 16: Spi Processor Companion Write
r e s t r i c t e d A Design Guide to SPI F-RAM™ Processor Companion - FM33256B Pseudo Code Examples 10.6 SPI Processor Companion Write /********PSoC3 Based Pseudo Code for SPI Processor Companion Write ********/ uint8 WRITE_RTC (uint8 addr, uint8... -
Page 17: Spi Processor Companion Read
r e s t r i c t e d A Design Guide to SPI F-RAM™ Processor Companion - FM33256B Pseudo Code Examples 10.7 SPI Processor Companion Read /************PSoC3 Based Pseudo Code for SPI Processor Companion Read*******/ uint8 READ_RTC (uint8 addr, uint8 *data_read_ptr,... -
Page 18: Revision History
r e s t r i c t e d A Design Guide to SPI F-RAM™ Processor Companion - FM33256B Revision history Revision history Document Date of release Description of changes version 2013-06-25 New Spec. 2014-11-17 Added PSoC 3-based User Module project Replaced Pseudo codes with PSoC 3-based application code. - Page 19 Infineon Technologies hereby disclaims dangerous substances. For information on the types © 2021 Infineon Technologies AG. any and all warranties and liabilities of any kind in question please contact your nearest Infineon All Rights Reserved. (including without limitation warranties of non- Technologies office.