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Aim ACE1553-3U-4 Hardware Manual

Quad stream pxi-express / cpci-express (3u) modules
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ACE1553-3U-4
Quad Stream
MIL-STD-1553
PXI-Express / cPCI-Express
(3U) Modules
Hardware
Manual
V01.10 Rev. A
January 2016

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Summary of Contents for Aim ACE1553-3U-4

  • Page 1 ACE1553-3U-4 Quad Stream MIL-STD-1553 PXI-Express / cPCI-Express (3U) Modules Hardware Manual V01.10 Rev. A January 2016...
  • Page 3 ACE1553-3U-4 Quad Stream MIL-STD-1553 PXI-Express / cPCI-Express (3U) Modules Hardware Manual V01.10 Rev. A January 2016 AIM No. 60-117E0-16-0110-A ACE1553-3U-4 Hardware Manual...
  • Page 4 Notice: The information that is provided in this document is believed to be accurate. No responsibility is assumed by AIM GmbH for its use. No license or rights are granted by implication in connection therewith. Specifications are subject to change without notice.
  • Page 5 The following table defines the history of this document. Version Cover Date Created by Description V01.00 Rev. A 10.06.2015 E. Carraro First Released Version New layout, corrections on the discrete V01.10 Rev. A 19.01.2016 E. Carraro section (CDR5898) ACE1553-3U-4 Hardware Manual...
  • Page 6 THIS PAGE IS INTENTIONALLY LEFT BLANK ACE1553-3U-4 Hardware Manual...

  • Page 7: Table Of Contents

    MIL-STD-1553-A/B Dual Channel Interface Connector ........5 2.3.2 General Purpose I/O Connections ..............5 Front Panel LEDs ....................6 STRUCTURE OF THE ACE1553-3U-4 ..............7 PCI-Express Interface and BIU-I/O FPGA ............8 3.1.1 Global RAM Interface and Arbitration .............. 8 3.1.2...
  • Page 8 Figure 2.2: Pinout of the 15 Pin HD-DSUB connector ............. 5 Figure 2.3: Status LED view ....................6 Figure 3.1: Block Diagram of ACE1553-3U-4 ................. 7 Figure 3.2: GPI/O ACE-1553-3U-x circuitry ................10 Figure 3.3: GPIO Protection with external resistor ..............11 Figure 3.4: MILbus Amplitude vs.

  • Page 9: Introduction

    2.5 Gbit/s in transmit and receive direction. The ACE1553 modules are used to simulate, monitor and inject protocol errors of MIL-STD- 1553A/B based databus systems. The ACE1553-3U-4 offers an interface for up to four dual- redundant MIL-STD-1553 bus channels. Furthermore the interface implements trigger IN/OUT functions for Bus Controller (BC), Remote Terminal (RT) and Bus Monitor (BM), as well as 2 user programmable Discrete I/O signals.

  • Page 10: How This Manual Is Organized

    MIL-STD-1553 Bus, IRIG-B, and triggers. Section 3 - STRUCTURE OF THE ACE1553-3U-4 - describes the physical hardware interfaces on the ACE1553 using a block diagram and a description of each main component Section 4 - TECHNICAL DATA - describes the technical specification of the ACE1553.

  • Page 11: Installation

    9. Secure the card to the PXIe/cPCIe chassis tightening the two bracket-retaining screws on the top and bottom of the front panel 10. Connect the system to the power source. Turn on the power of your system. ACE1553-3U-4 Hardware Manual...

  • Page 12: Connecting To Other Devices

    Terminals, as well as the IRIG IN/OUT interface for multi-channel time tag synchronization. Figure 2.1: Front Panel View The ACE1553-3U-4 interface comprises two female DSUB15 connectors, which providing the MILbus signals, the Trigger IN/OUT, the GPIOs and the IRIG IN/OUT signals.

  • Page 13: Mil-Std-1553-A/B Dual Channel Interface Connector

    Avionic Level inputs and outputs. The GPIO’s can be used as simple discrete inputs or outputs, for example to generate strobes (i.e. to another AIM board) or to sample a digital input signal generated by an external system (or AIM board).

  • Page 14: Front Panel Leds

    LED illuminates permanently if the MILbus channel 4 is connected. flashes MILbus Activity detected Encoder/Decoder of the MILbus channel 4. PCI Activity Blue LED flashes if there is local (on board PCIe/PCI bus) activity Table 2.2: Front Panel LED description ACE1553-3U-4 Hardware Manual...

  • Page 15: Structure Of The Ace1553-3U-4

    STRUCTURE OF THE ACE1553-3U-4 The structure of the ACE1553-3U-4 is shown in Figure 3.1. The ACE1553-3U-4 comprises the following main sections:  PCI-Express bus and BIU-IO FPGA  Global RAM  BIU Processor Section  Physical I/O Interface with up to four Dual redundant MIL-STD-1553B Channels ...

  • Page 16: Pci-Express Interface And Biu-I/O Fpga

    PCI-Express Interface and BIU-I/O FPGA The new common FPGA architecture of AIM’s PCI-Express family includes both the complete PCI-Express bus logic and the BIU processor logic. This programmable device implements the following features:  PCI Express 1.1 compliant bus interface ...

  • Page 17: Irig-B Encoder/Decoder And Timecode Processor (Tcp)

    MILbus channel at the Front I/O connector. The minimum trigger pulse length must be greater than 75 nanoseconds to be detected. The trigger inputs are high active and their voltage level is of type TTL and is +5.0V tolerant. ACE1553-3U-4 Hardware Manual...

  • Page 18: User Programmable Discrete I/O (Gpio)

    3.1.9 User programmable Discrete I/O (GPIO) The ACE1553-3U-4 module provides 2 user programmable discrete I/O signals. Discrete input signals are always active whereas the discrete output signals are per default inactive. An open collector circuitry is used for the discrete output with approximately 4V provided by default. An external voltage from 0 to 35V can be supplied externally for switching higher voltages.

  • Page 19: Global Ram

    Up to two Bus Interface Units (BIUs) are implemented on the ACE1553-3U module. Both BIUs implement exactly the same functionality. Each BIU handle up to two MIL-STD-1553B channels and provide the trigger signals for BC, RT and BM applications. The control logic is implemented in the common FPGA device. ACE1553-3U-4 Hardware Manual...

  • Page 20: Physical Bus Interface With Four Dual Redundant Mil-Std-1553B Channels

    Transformer coupled with resistive network emulation  Isolated (Internal termination) MILbus Coupling Representation MIL-BUS Isolated (Default) No connection to the MILbus MIL-BUS Transformer Coupled MIL-BUS Direct Coupled MIL-BUS Transformer Coupled with Network Emulation =69,62R Table 3.1: Different Coupling for MILbus channels ACE1553-3U-4 Hardware Manual...

  • Page 21: Figure 3.4: Milbus Amplitude Vs. V

    The 100% value depends on the transceiver type, the coupling mode and the bus termination. The output value is approximatively 20Volts for a transformer coupled stub terminated with 70Ω. Vcontrol [V] Figure 3.4: MILbus Amplitude vs. V control ACE1553-3U-4 Hardware Manual...

  • Page 22: Irig- And Time Code Section

    3. Single or Multiple AIM-Module(s) with External IRIG-B Source Connect external IRIG-B source to IRIG-IN and GND of all modules 4. Multiple AIM-Modules with No External IRIG-B Source Internally Synchronized. Connect the IRIG-OUT signal and the GND of the module you have chosen as the time master to all IRIG-IN signals (including the time master).

  • Page 23: General Purpose Discrete Inputs/Outputs (Gpio)

    The ACE1553-3U-4 provides two General Purpose Discrete I/O's (GPIO’s). The GPIO’s can be used as simple discrete inputs or outputs, for example to generate strobes (i.e. to another AIM board) or to sample a digital input signal generated by an external system (or AIM board).
  • Page 24 THIS PAGE IS INTENTIONALLY LEFT BLANK ACE1553-3U-4 Hardware Manual...

  • Page 25: Pxi-Express Instrumentation Bus

    PXIe combines industry-standard PC components, such as the PCI-Express bus, with advanced triggering and synchronization extensions on the backplane, backward compatible with the PXI triggering and synchronization bus. The PXI-functions can be controlled via the API interface. ACE1553-3U-4 Hardware Manual...

  • Page 26: Backplane Trigger Lines

    Finally, trigger signals can be routed into and out of the chassis with many of the newer controllers. The ACE1553-3U-4 card can route its Trigger INPUTs and/or Trigger OUTPUTs to the PXI backplane trigger lines, letting the user to deliver /receive trigger signals to/from other PXI cards present in the system (a Trigger Controller, another AIM PXI-capable product).

  • Page 27: Figure 4.2: Pxi/Front Panel-Pbi Trigger Routing Capabilities

    Figure 4.2: PXI/Front Panel-PBI Trigger Routing capabilities ACE1553-3U-4 Hardware Manual...

  • Page 28: System Reference Clock (10Mhz)

    Furthermore, because the clock lines are built into the backplane, the lines are better shielded than external lines. The ACE1553-3U-4 card can be set to deliver the PXI 10 MHz System Clock to its internal TIME TAG generation circuitry. The IRIG decoder will then work in Free-Wheeling mode but synchronous to the PXI 10 MHz clock.

  • Page 29: Star Trigger

    The ACE1553-3U-4 card can use the PXI STAR input signal to perform a TTAG reset (clear) to DAY 1. This TTAG reset to DAY 1 will work if the IRIG circuitry is running in Free-Wheeling mode: ...
  • Page 30 THIS PAGE IS INTENTIONALLY LEFT BLANK ACE1553-3U-4 Hardware Manual...

  • Page 31: Technical Data

    For each BIU, one Manchester Decoder with Parity checker and error detection.  Single implementation with bus switching logic (not redundant).  Full error detection and indication  Inter-word gap and Response Time Measurement (<=100µs) with 250ns resolution. ACE1553-3U-4 Hardware Manual...
  • Page 32 Lock time: < 5s Free-wheeling accuracy after 10 Minutes < 1ppm (assuming input signal accuracy better than 50ppm) Encoder: Format: AIM Standard (based on IRIG B format) Absolute Accuracy: +/-25ppm (standard Oscillator) Signal Waveform: Amplitude modulated sine wave Output Amplitude:...
  • Page 33 Pulse-width multiple of 100ns IRIG-IN: AC-coupled Input resistor ~ 10K, with high speed EMV varistor. 0.5 to 5.0 Vpp input voltage IRIG-OUT: AC-coupled Output resistor ~ 51, with high speed EMV varistor. ~ 3 Vpp output voltage ACE1553-3U-4 Hardware Manual...
  • Page 34 : all channels transmitting at 100% Bus load, Transformer coupled, 70Ω Note Termination, MIL-Bus output Voltage appr. 20V Temperature: Standard Operating +45°C Extended Temperature (on request) +60°C Storage +85°C Humidity: 0% to 95% non-condensing Weight: ~ 250g ACE1553-3U-4 Hardware Manual...

  • Page 35: Notes

    Random Access Memory SIMM Single Inline Memory Module SRAM Static Random Access Memory SSRAM Synchronous Static Random Access Memory SDRAM Synchronous Dynamic RAM Software Test Access Port (for JTAG) Time Code Processor UART Universal Asynchronous Receiver and Transmitter ACE1553-3U-4 Hardware Manual...

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