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Aim ACE1553-3U-1/2 Installation Manual

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ACE1553-3U-1/2 (DS)
Single/Dual Stream
MIL-STD-1553
PXI-Express / cPCI-Express
(3U) Modules
(incl. optional MILScope functionality)
Hardware
Manual
V01.10 Rev. B
December 2021

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Summary of Contents for Aim ACE1553-3U-1/2

  • Page 1 ACE1553-3U-1/2 (DS) Single/Dual Stream MIL-STD-1553 PXI-Express / cPCI-Express (3U) Modules (incl. optional MILScope functionality) Hardware Manual V01.10 Rev. B December 2021...
  • Page 3 ACE1553-3U -1/2 (DS) Single/Dual Stream MIL-STD-1553 PXI-Express / cPCI-Express (3U) Modules (incl. optional MILScope functionality) Hardware Manual V01.10 Rev. B December 2021 AIM No. 60-117Dx-16-0110-B ACE1553-3U-1/2-(DS) Hardware Manual...
  • Page 4 Notice: The information that is provided in this document is believed to be accurate. No responsibility is assumed by AIM GmbH for its use. No license or rights are granted by implication in connection therewith. Specifications are subject to change without notice.

  • Page 5: Document History

    V01.10 Rev. A 19.01.2016 E. Carraro New layout, corrections on the discrete section (CDR5898) V01.10 Rev. B 08.12.2021 M. Haag Removed invalid ASP reference. Removed MILBus amplitude vs. DAC figure. Removed obsolete Digital Scope 100MHz interleave mode. ACE1553-3U-1/2-(DS) Hardware Manual...
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  • Page 7: Table Of Contents

    General Purpose Discrete Inputs/Outputs (GPIO) ......... 16 PXIe / cPCIe - Connector Pin Assignment ............17 MILSCOPE FUNCTIONALITY ................19 Structure of the ACE1553-3U-1/2-DS ..............19 MILScope PBI section ................... 20 MILScope Mainboard section ................ 21 Implemented MILScope functions ..............21 Trigger Functions ..................
  • Page 8 Figure 2.3: Pinout of the 26 Pin DSUB connector ..............6 Figure 2.4: Status LEDs view ....................7 Figure 3.1: Block Diagram of ACE1553-3U-1/2(-DS) .............. 9 Figure 3.2: GPI/O ACE-1553-3U-x circuitry ................12 Figure 3.3: GPIO Protection with external resistor ..............13 Figure 4.1: Structure of the MILScope ..................

  • Page 9: Introduction

    2.5 Gbit/s in transmit and receive direction. The ACE1553 modules are used to simulate, monitor and inject protocol errors of MIL-STD- 1553A/B based databus systems. The ACE1553-3U-1/2 offers an interface for up to two dual- redundant MIL-STD-1553 bus channels. Furthermore the interface implements trigger IN/OUT functions for Bus Controller (BC), Remote Terminal (RT) and Bus Monitor (BM), as well as 5 user programmable Discrete I/O signals.

  • Page 10: How This Manual Is Organized

    PXI Hardware Specification – Rev. 2.2 – September 22, 2004 MIL-STD-1553B, Department of Defence Interface Standard for Digital Time Division Command/Response Multiplex Data Bus, Notice 1-4, January 1996 Product Specific AIM Documents AIM - Reference Manual ACE1553 Application Interface Library Detailed description of the programming interface. ACE1553-3U-1/2-(DS) Hardware Manual...

  • Page 11: Installation

    9. Secure the card to the PXIe/cPCIe chassis tightening the two bracket-retaining screws on the top and bottom of the front panel 10. Connect the system to the power source. Turn on the power of your system. ACE1553-3U-1/2-(DS) Hardware Manual...

  • Page 12: Connecting To Other Devices

    Terminals, as well as the IRIG IN/OUT interface for multi-channel time tag synchronization. Figure 2.1: Front Panel View The ACE1553-3U-1/2(-DS) interface comprises a female DSUB9 connector for providing the MILbus signals and a DSUB26 connector for the Trigger IN/OUT, GPIOs and the IRIG IN/OUT signals.

  • Page 13: Table 2.1: Pin Description Of Dsub9 Front-Panel Connector

    (ACE1553-1/2) MILBus Channel 2 Primary (true) (ACE1553-2 only) MILBus# Channel 2 Primary (complement) (ACE1553-2 only) MILBus Channel 2 Secondary (true) (ACE1553-2 only) MILBus# Channel 2 Secondary (complement) (ACE1553-2 only) Table 2.1: Pin Description of DSUB9 front-panel connector ACE1553-3U-1/2-(DS) Hardware Manual...

  • Page 14: General Purpose Connector (Irig B, Trigger, Gpio Or Rs232 Signals)

    General Purpose Input/Output 5 (GPIO5) reserved reserved Table 2.2: Pin Description of DSUB26 front-panel connector General Purpose I/O Connections Five General Purpose I/O's (GPIO1 - GPIO5) are provided on the general purpose connector with Avionic Level inputs and outputs. ACE1553-3U-1/2-(DS) Hardware Manual...

  • Page 15: Front Panel Leds

    The GPIO’s can be used as simple discrete inputs or outputs, for example to generate strobes (i.e. to another AIM board) or to sample a digital input signal generated by an external system (or AIM board). 2.4 Front Panel LEDs Two sub miniature LEDs for each channel, located at the front panel, indicate the module status.
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  • Page 17: Structure Of The Ace1553-1/-2

    STRUCTURE OF THE ACE1553-1/-2 The structure of the ACE1553-3U-1/2(-DS) is shown in Figure 3.1. The module comprise the following main sections: PCI-Express bus and BIU-IO FPGA  Global RAM   BIU Processor Section Physical I/O Interface with up to two Dual redundant MIL-STD-1553B Channels ...

  • Page 18: Pci-Express Interface And Biu-I/O Fpga

    3.1 PCI-Express Interface and BIU-I/O FPGA The new common FPGA architecture of AIM’s PCI-Express family includes both the complete PCI-Express bus logic and the BIU processor logic. This programmable device implements the following features:  PCI Express 1.1 compliant bus interface ...

  • Page 19: Irig-B Encoder/Decoder And Timecode Processor (Tcp)

    MILbus channel at the Front I/O connector. The minimum trigger pulse length must be greater than 75 nanoseconds to be detected. The trigger inputs are high active and their voltage level is of type TTL and is +5.0V tolerant. ACE1553-3U-1/2-(DS) Hardware Manual...

  • Page 20: User Programmable Discrete I/O (Gpio)

    User programmable Discrete I/O (GPIO) The ACE1553-3U-1/2(-DS) module provides 5 user programmable discrete I/O signals. Discrete input signals are always active whereas the discrete output signals are per default inactive. An open collector circuitry is used for the discrete output with approximately 4V provided by default.

  • Page 21: Global Ram

    Up to two Bus Interface Units (BIUs) are implemented on the ACE1553-3U module. Both BIUs implement exactly the same functionality. Each BIU handle up to two MIL-STD-1553B channels and provide the trigger signals for BC, RT and BM applications. The control logic is implemented in the common FPGA device. ACE1553-3U-1/2-(DS) Hardware Manual...

  • Page 22: Physical Bus Interface With Two Dual Redundant Mil-Std-1553B Channels

    Transformer coupled with resistive network emulation  Isolated (Internal termination)  MILbus Coupling Representation MIL-BUS Isolated (Default) No connection to the MILbus MIL-BUS Transformer Coupled MIL-BUS Direct Coupled MIL-BUS Transformer Coupled with Network Emulation =69,62R Table 3.1: Different Coupling Modes ACE1553-3U-1/2-(DS) Hardware Manual...

  • Page 23: Irig- And Time Code Section

    The time tag on the board is generated in the format explained in the following table: Time Element Number of bits DAYS of Year HOURS of Day MINUTES of Hour SECONDS of Minute MICROSECONDS of Second Summary 46 (6 Bytes, stored in two 32bit words) Table 3.2: IRIG-B: Binary Coded Time Tag ACE1553-3U-1/2-(DS) Hardware Manual...

  • Page 24: Time Tag Methods

    The ACE1553 provides five General Purpose Discrete I/O's (GPIO’s). The GPIO’s can be used as simple discrete inputs or outputs, for example to generate strobes (i.e. to another AIM board) or to sample a digital input signal generated by an external system (or AIM board).

  • Page 25: Pxie / Cpcie - Connector Pin Assignment

    PXI_TRIG_3 PXI_TRIG_4 PXI_TRIG_5 PXI_TRIG_6 PXI_TRIG_2 PXI_STAR PXI_CLK10 PXI_TRIG_1 PXI_TRIG_0 PXI_TRIG_7 PXI_LBL6 PXI_LBR6 Table 3.3 PXIe XJ4 connector's pin-out XJ3 Connector PERST# GND 1refCLK+ 1refCLK- GND 1PETp0 1PETn0 1PERp0 1PERn0 Table 3.4: PXIe XJ3 connector's pin-out RSV: Reserved Pin ACE1553-3U-1/2-(DS) Hardware Manual...
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  • Page 27: Milscope Functionality

    MILSCOPE FUNCTIONALITY This section describes the functionality of the MILScope part on an ACE1553-3U-1/2-DS module and is only available on the –DS (digital scope) versions. On an ACE1553-3U-2-DS module, the MILScope functionality is only available for MILbus Channel 1. 4.1 Structure of the ACE1553-3U-1/2-DS...

  • Page 28: Milscope Pbi Section

    Stub measurement Coupling range Extern Figure 4.2: MilScope coupling modes The A/DC has a resolution of 10Bit, therefore a LSB in the 30V measurement range represents: Whereas a LSB in the 3V measurement range represents:   ACE1553-3U-1/2-(DS) Hardware Manual...

  • Page 29: Milscope Mainboard Section

    20ns (two channels, 6kByte data queue size limitation)  20ns (one channel, data queue size is 16MByte see Note) 40ns (1 or 2 channels, data queue size is 16MByte see Note) 5,1µs (1 or 2 channels, data queue size is 16MByte see Note) ACE1553-3U-1/2-(DS) Hardware Manual...

  • Page 30: Input Filter And Noise

    Trigger Input BM, ch 2 Trigger Input BC, ch 2 Trigger Input RT, ch 2 IRIG Output IRIG Input GPIO2 GPIO5 GPIO1 GPIO3 MILScope_extern_chB MILScope_extern_chA #MILScope_extern_chB #MILScope_extern_chA GPIO4 Note : ACE1553-3U-2/DS only Note : GPIO=General Purpose Discrete I/O ACE1553-3U-1/2-(DS) Hardware Manual...

  • Page 31: Pxi-Express Instrumentation Bus

    PXIe combines industry-standard PC components, such as the PCI-Express bus, with advanced triggering and synchronization extensions on the backplane, backward compatible with the PXI triggering and synchronization bus. The PXI-functions can be controlled via the API interface. ACE1553-3U-1/2-(DS) Hardware Manual...

  • Page 32: Backplane Trigger Lines

    The ACE1553-3U-1/2(-DS) card can route its Trigger INPUTs and/or Trigger OUTPUTs to the PXI backplane trigger lines. Thus, the user can generate /receive trigger signals to/from other PXI cards present in the system (a Trigger Controller, another AIM PXI- capable product).

  • Page 33: Figure 5.2: Pxi/Front Panel-Pbi Trigger Routing Capabilities

    Figure 5.2: PXI/Front Panel-PBI Trigger Routing capabilities ACE1553-3U-1/2-(DS) Hardware Manual...

  • Page 34: System Reference Clock (10Mhz)

    Furthermore, because the clock lines are built into the backplane, the lines are better shielded than external lines. The ACE1553-3U-1/2(-DS) card can be set to deliver the PXI 10 MHz System Clock to its internal TIME TAG generation circuitry. The IRIG decoder will then work in Free-Wheeling mode but synchronous to the PXI 10 MHz clock.

  • Page 35: Star Trigger

    The ACE1553-3U-1/2(-DS) card can use the PXI STAR input signal to perform a TTAG reset (clear) to DAY 1. This TTAG reset to DAY 1 will work if the IRIG circuitry is running in Free-Wheeling mode: ...
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  • Page 37: Technical Data

    For each BIU, one Manchester Decoder with Parity checker and error detection. Single implementation with bus switching logic (not redundant).  Full error detection and indication  Inter-word gap and Response Time Measurement (<=100µs) with 250ns  resolution. ACE1553-3U-1/2-(DS) Hardware Manual...
  • Page 38 Lock time: < 5s Free-wheeling accuracy after 10 Minutes < 1ppm (assuming input signal accuracy better than 50ppm) Encoder: Format: AIM Standard (based on IRIG B format) Absolute Accuracy: +/-25ppm (standard Oscillator) Signal Waveform: Amplitude modulated sine wave Output Amplitude:...
  • Page 39 Sampling rate=20ns ≥41dB Bandwidth (3dB) (3): Sampling rate=20ns >15MHz Sampling rate=40ns >7,5MHz ´ Linearity: <2% Trigger functions: Higher Than Lower Than High Pulse Low Pulse Complex BUS MONITOR protocol trigger Resolution:  1024 Signal to Noise Ratio: 3dB Bandwidth: ACE1553-3U-1/2-(DS) Hardware Manual...
  • Page 40 Pulse-width multiple of 100ns IRIG-IN: AC-coupled Input resistor ~ 10K, with high speed EMV varistor. 0.5 to 5.0 Vpp input voltage IRIG-OUT: AC-coupled Output resistor ~ 51, with high speed EMV varistor. ~ 3 Vpp output voltage ACE1553-3U-1/2-(DS) Hardware Manual...
  • Page 41 : all channels transmitting at 100% Bus load, Transformer coupled, 70Ω Termination, MIL-Bus output Voltage appr. 20V Temperature: Standard Operating +45°C Extended Temperature (on request) +60°C Storage +85°C Humidity: 0% to 95% non-condensing Weight: ~ 270g for the ACE-1553-3U-2-DS ACE1553-3U-1/2-(DS) Hardware Manual...

  • Page 42: Notes

    Random Access Memory SIMM Single Inline Memory Module SRAM Static Random Access Memory SSRAM Synchronous Static Random Access Memory SDRAM Synchronous Dynamic RAM Software Test Access Port (for JTAG) Time Code Processor UART Universal Asynchronous Receiver and Transmitter ACE1553-3U-1/2-(DS) Hardware Manual...

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