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ACE1553-3U-4
Aim ACE1553-3U-4 Manuals
Manuals and User Guides for Aim ACE1553-3U-4. We have
1
Aim ACE1553-3U-4 manual available for free PDF download: Hardware Manual
Aim ACE1553-3U-4 Hardware Manual (35 pages)
Quad Stream PXI-Express / cPCI-Express (3U) Modules
Brand:
Aim
| Category:
Computer Hardware
| Size: 1 MB
Table of Contents
Table of Contents
7
Introduction
9
General
9
How this Manual Is Organized
10
Applicable Documents
10
Industry Documents
10
Product Specific AIM Documents
10
Installation
11
Preparation and Precaution for Installation
11
Installation Instructions
11
Connecting to Other Devices
12
Figure 2.1: Front Panel View
12
MIL-STD-1553-A/B Dual Channel Interface Connector
13
General Purpose I/O Connections
13
Table 2.1: Pin Description of the Two HD-DSUB15 Front-Panel Connectors
13
Figure 2.2: Pinout of the 15 Pin HD-DSUB Connector
13
Front Panel Leds
14
Table 2.2: Front Panel LED Description
14
Figure 2.3: Status LED View
14
Structure of the Ace1553-3U-4
15
Figure 3.1: Block Diagram of ACE1553-3U-4
15
PCI-Express Interface and BIU-I/O FPGA
16
Global RAM Interface and Arbitration
16
Boot Function
16
Controller for SPI-Flash Update Programming
16
MIL-STD-1553 Encoder
16
MIL-STD-1553 Decoder
16
IRIG-B Encoder/Decoder and Timecode Processor (TCP)
17
System & Maintenance Controller / RS232 Maintenance Interface
17
External Trigger Inputs and Outputs
17
User Programmable Discrete I/O (GPIO)
18
Figure 3.2: GPI/O ACE-1553-3U-X Circuitry
18
Global RAM
19
BIU Section
19
Figure 3.3: GPIO Protection with External Resistor
19
Physical Bus Interface with Four Dual Redundant MIL-STD-1553B Channels
20
Table 3.1: Different Coupling for Milbus Channels
20
Figure 3.4: Milbus Amplitude Vs. V
21
IRIG- and Time Code Section
22
Time Code Encoder/Decoder
22
Time Tag Methods
22
Table 3.2: IRIG-B: Binary Coded Time Tag
22
General Purpose Discrete Inputs/Outputs (GPIO)
23
Pxie / Cpcie - Connector Pin Assignment
23
Table 3.3 Pxie XJ4 Connector's Pin-Out
23
Table 3.4: Pxie XJ3 Connector's Pin-Out
23
Pxi-Express Instrumentation Bus
25
About the Pxie Standard
25
Figure 4.1: PXI Architecture
25
Backplane Trigger Lines
26
Figure 4.2: Pxi/Front Panel-PBI Trigger Routing Capabilities
27
System Reference Clock (10Mhz)
28
Star Trigger
29
Technical Data
31
Notes
35
Acronyms
35
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