Phytec L-1008e.A0 phyCORE-i.MX 8M Plus Alpha Kit Quick Start Manual

Advertisement

Quick Links

L-1008e.A0 phyCORE-i.MX 8M Plus Alpha Kit Quickstart
Guide
L-1008e.A0 phyCORE-i.MX 8M Plus Alpha Kit Quickstart Guide
L-1008e.A0 phyCORE-i.MX 8M Plus Alpha Kit Quickstart Guide
Document Title
Quickstart Guide
Document Type
L-1008e.A0
Article Number
05.11.2020
Release Date
https://wiki.phytec.com/x/OA_wCw
Is Branch of
1
Introduction
2
Requirements
2.1
Hardware
2.1.1
Included in Kit
2.1.2
Components
2.1.3
Additional Equipment
2.1.4
Additional Equipment (not included in Alpha Kit)
3
Connecting the phyBOARD-Pollux
3.1
Connecting the USB Debug Interface
3.2
Connecting the RS-232 / RS-485 Interface
3.3
Connecting the CAN Interfaces
3.4
Connecting USB
3.5
Connecting to the Ethernet
3.6
Connecting a phyCAM-M camera module
3.7
Connecting LVDS Display and Touch-Screen
3.8
Connecting WLAN Adapter PEB-WLBT-05-UCon.A0
3.9
Powering the Board
4
Linux Host PC
4.1
Getting Started with the Included SD Card
4.1.1
Booting from the SD Card
5
Building the BSP
5.1
Get the BSP
5.2
Basic Set-Up
5.3
Finding the Right Software Platform
5.4
Software Platform Selection
5.5
Build Process
5.6
BSP Images
6
System Booting
6.1
Booting from eMMC
6.2
Booting from SD Card
6.2.1
Single, Prebuilt SD Card Image
6.2.2
Four Individual Images (imx-boot, kernel image, device tree image, root filesystem)
6.3
Booting the Kernel from Network
6.3.1
Development Host Preparations
6.3.2
TFTP Server Set-Up
6.3.3
Embedded Board Preparations
6.3.4
Booting the Embedded Board
7
Updating Software
7.1
Updating eMMC via Network
7.1.1
Updating eMMC in u-boot on Target
7.1.2
Updating eMMC in Linux on Target
7.1.3
Updating eMMC in Linux on Host
7.2
Updating eMMC via SD Card
7.2.1
Updating SD Card in u-boot on Target
7.2.2
Updating SD Card in Linux on Target
8
Device Tree (DT)
8.1
Introduction
8.2
PHYTEC i.MX 8M Plus BSP Device Tree Concept
8.2.1
DT Structure
9
Accessing Peripherals
9.1
i.MX 8M Plus Pin Muxing
9.2
Network
9.3
SD / MMC Card
9.4
eMMC Devices
9.4.1
Extended CSD Register
9.4.2
Enabling Background Operations (BKOPS)
PHYTEC
7.2.1.1
Configuring SD Card for Flash
7.2.1.2
Flashing eMMC from u-boot
Page 1

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the L-1008e.A0 phyCORE-i.MX 8M Plus Alpha Kit and is the answer not in the manual?

Questions and answers

Subscribe to Our Youtube Channel

Summary of Contents for Phytec L-1008e.A0 phyCORE-i.MX 8M Plus Alpha Kit

  • Page 1 PHYTEC L-1008e.A0 phyCORE-i.MX 8M Plus Alpha Kit Quickstart Guide L-1008e.A0 phyCORE-i.MX 8M Plus Alpha Kit Quickstart Guide L-1008e.A0 phyCORE-i.MX 8M Plus Alpha Kit Quickstart Guide Document Title Quickstart Guide Document Type L-1008e.A0 Article Number 05.11.2020 Release Date https://wiki.phytec.com/x/OA_wCw Is Branch of...
  • Page 2 * Pin Muxing Table - a complete list of all signal chains from processor to carrier board output. Signal level, signal type, and other useful information is also included. For more information or details regarding the phyCORE-i.MX 8M Plus, please contact the PHYTEC Sales department. Requirements The following components and system requirements are necessary to successfully complete this Quickstart.
  • Page 3: Additional Equipment

    PHYTEC phyBOARD-Pollux Components - Front phyBOARD-Pollux Components - Back Additional Equipment Page 3...
  • Page 4 As this is an Alpha Kit, there will be continuous revisions being made to the phyCORE-i.MX 8M Plus SOM and phyBOARD-Pollux. Due to this, components and features may not be available. Contact PHYTEC if there any questions regarding components and features for this Alpha Kit.
  • Page 5 PHYTEC RS-485 Half Duplex Use adapter 2.54 10P to DB9P Male (WF228) or connect the phyBOARD Pollux to the periphery via a DB9 cable. Warning Do not modify JP3 or JP4 while the board is powered. RS-232 DTE (data terminal equipment) means that TXD and RTS are outputs, RXD und CTS are inputs Connecting the CAN Interfaces There are two CAN-FD transceivers providing CAN and CAN-FD (CAN flexible datarate) up to 8 Mbps.
  • Page 6 PHYTEC Warning Please note the polarity of the power component X23. Ensure that your power adapter is correctly set up to use the polarity as shown below. It is possible to power the phyBOARD-Pollux with a USB-PD (USB power-delivery) supply instead of the power supply SV055.
  • Page 7: Booting From The Sd Card

    Please check the download page on the PHYTEC website to find the correct information. The console output can be viewed in your terminal window. If everything was done correctly, the login prompt will be shown at the end of the booting process: Yogurt Vendor xwayland (Phytec Vendor Distribution) BSP-Yocto-FSL-i.MX8MP-ALPHA1 phyboard-pollux-imx8mp-1...
  • Page 8 Finding the Right Software Platform The i.MX 8M Plus BSP is planned as a unified BSP, which means, in the future, it will support a set of different PHYTEC carrier boards (CB) with different Systems on Module (SOMs). However, this ALPHA BSP supports the PHYTEC machine: Note As this is an alpha build, there will be several changes in both hardware and software.
  • Page 9: System Booting

    Kernel: Image Kernel device tree file: oftree Root filesystem: phytec-qt5demo-image-phyboard-pollux-imx8mp-1.tar.gz, phytec-qt5demo-image-phyboard-pollux-imx8mp-1.manifest SD card image: phytec-qt5demo-image-phyboard-pollux-imx8mp-1.sdcard The default Linux image phytec-qt5demo-image will start a Wayland Weston, even if there is no display connected. System Booting The default boot source for the i.MX 8M Plus module phyBOARD-Pollux is eMMC. But for the alpha release , the BSP is available on SD-Card.
  • Page 10: Booting From Sd Card

    U-Boot 2020.04 (Nov 02 2020 - 19:09:42 +0000) CPU: i.MX8MP[8] rev1.0 1800 MHz (running at 1200 MHz) CPU: Commercial temperature grade (0C to 95C) at 47C Reset cause: POR Model: PHYTEC phyCORE-i.MX8MP Watchdog enabled DRAM: 2 GiB MMC: FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC...
  • Page 11 After having unmounted all devices with an appended number ( <your_device><number> ), you can create your bootable SD card with: host$ sudo dd of=/dev/<your_device> if=phytec-qt5demo-image-phyboard-pollux-imx8mp-1.sdcard bs=1MB conv=fsync status=progress If you use the image file created by Bitbake instead: host$ sudo dd of=/dev/<your_device> if=phytec-qt5demo-image-phyboard-pollux-imx8mp-1-<BUILD-TIME>.sdcard bs=1MB...
  • Page 12 PHYTEC host$ sudo fdisk -l /dev/sdc You will receive: Disk /dev/sdc: 4025 MB, 4025483264 bytes 4 heads, 32 sectors/track, 61424 cylinders, total 7862272 sectors Units = sectors of 1 * 512 = 512 bytes Sector size (logical/physical): 512 bytes / 512 bytes...
  • Page 13: Tftp Server Set-Up

    PHYTEC host$ sudo apt-get install tftpd-hpa After the installation of the packages, you have to configure the TFTP server. TFTP Server Set-Up Edit /etc/default/tftpd-hpa TFTP_USERNAME="tftp" TFTP_DIRECTORY="/tftpboot" TFTP_ADDRESS=":69" TFTP_OPTIONS="--secure" Create a directory to store the TFTP files: host$ sudo mkdir /tftpboot...
  • Page 14: Updating Software

    PHYTEC ipaddr=192.168.3.11 netmask=255.255.255.0 gateway=192.168.3.10 serverip=192.168.3.10 ethprime=eth1 nfsroot=/nfs If you need to change something, type: u-boot=> editenv <parameter> edit: <value> ethaddr ethprime is not set, you should add it by typing something similar to: u-boot=> setenv <parameter> <value> <parameter> should be either...
  • Page 15 A working network is necessary! Show your available image-files on host: host$ ls phytec-qt5demo-image-phyboard-pollux-imx8mp-1.sdcard Uncompress and send image with dd command combined with through the network to the eMMC of your device: host$ dd if=phytec-qt5demo-image-phyboard-pollux-imx8mp-1.sdcard status=progress | ssh root@192.168.3.11 "dd of= /dev/mmcblk2" Page 15...
  • Page 16 PHYTEC Updating eMMC via SD Card Even if there is no network available, you can update the eMMC. For that, you only need a ready-to-use image file ( *.sdcard ) located on the SD card. Because the image file is quite large, you have to enlarge your SD card to use its full space (if it was not enlarged before). To enlarge your SD card, see...
  • Page 17 2 133120 1502846 3e7970c8-02 83 u-boot=> Updating SD Card in Linux on Target You can also update the eMMC under Linux. You only need a complete image saved on the SD card (e.q. phytec-qt5demo-image-phyboard-pollux- imx8mp-1.sdcard Show your saved image files on the SD card: target$ ls phytec-qt5demo-image-phyboard-pollux-imx8mp-1.sdcard...
  • Page 18 GPIO connections, and peripheral devices." PHYTEC i.MX 8M Plus BSP Device Tree Concept The following sections explain some rules we have defined on how to set up device trees for our i.MX 8M Plus SoC based boards.
  • Page 19 Module .dtsi Accessing Peripherals To find out which boards and modules are supported by the release of PHYTEC’s i.MX8 BSP described herein, visit our web page at http://www.phytec.de /produkte/software/yocto/phytec-unified-yocto-bsp-releases/ and click the corresponding BSP release. here you can find all hardware supported in the columns "Hardware Article Number"...
  • Page 20 PHYTEC The following is an example of the pin muxing of the UART1 device in imx8mp-phyboard-pollux.dtsi pinctrl_flexcan1: flexcan1grp { fsl,pins = < MX8MP_IOMUXC_SAI2_TXC__CAN1_RX 0x154 MX8MP_IOMUXC_SAI2_RXC__CAN1_TX 0x154 >; The first part of the string MX8MP_IOMUXC_SAI2_TXC__CAN1_RX names the pad (in this example SAI2_TXC ).
  • Page 21 PHYTEC […] #include <dt-bindings/net/ti-dp83867.h> […] /* ethernet 0 */ &eqos { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_eqos>; phy-mode = "rgmii-id"; phy-handle = <&ethphy0>; status = "okay"; mdio { compatible = "snps,dwmac-mdio"; #address-cells = <1>; #size-cells = <0>; ethphy0: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c22";...
  • Page 22 PHYTEC After inserting an SD/MMC card, the kernel will generate new device nodes in /dev . The full device can be reached via its /dev/mmcblk1 device node. SD /MMC card partitions will show up in the following way: /dev/mmcblk1p<Y> <Y> counts as the partition number starting from 1 to the max count of partitions on this device. The partitions can be formatted with any kind of file system and also handled in a standard manner, e.g.
  • Page 23 PHYTEC […] /* SD-Card */ &usdhc2 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; vmmc-supply = <&reg_usdhc2_vmmc>; bus-width = <4>; status = "okay"; […] &iomuxc { […]...
  • Page 24 PHYTEC […] /* eMMC */ &usdhc3 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc3>; pinctrl-1 = <&pinctrl_usdhc3_100mhz>; pinctrl-2 = <&pinctrl_usdhc3_200mhz>; bus-width = <8>; non-removable; status = "okay"; […] &iomuxc { […] pinctrl_usdhc3: usdhc3grp { fsl,pins = < MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190...
  • Page 25 Devices PHYTEC modules like phyCORE-i.MX 8M Plus are populated with an eMMC memory chip as the main storage. eMMC devices contain raw MLC memory cells combined with a memory controller that handles ECC and wear leveling. They are connected via an MMC/SD interface to the i.MX 8M Plus and are...
  • Page 26 For further information, see the JEDEC Standard chapter "7.2 Partition Management". Do not confuse eMMC partitions with partitions of a DOS, MBR, or GPT partition table. The current PHYTEC BSP does not use the extra partitioning feature of eMMC devices. The u-boot...
  • Page 27 PHYTEC The output will look like this: Device: FSL_SDHC Manufacturer ID: 13 OEM: 14e Name: S0J56 Bus Speed: 52000000 Mode: MMC High Speed (52MHz) Rd Block Len: 512 MMC version 5.1 High Capacity: Yes Capacity: 14.8 GiB Bus Width: 8-bit...
  • Page 28 PHYTEC target$ fdisk /dev/mmcblk2 The number of cylinders for this disk is set to 485632. There is nothing wrong with that, but this is larger than 1024, and could in certain setups cause problems with: 1) software that runs at boot time (e.g., old versions of LILO) 2) booting and partitioning software from other OSs (e.g., DOS FDISK, OS/2 FDISK)
  • Page 29: Spi Master

    PHYTEC The option --secure ensures that the command waits until the eMMC device has erased all blocks. dd if=/dev/zero of=/dev/mmcblk0 also destroys all information on the device, but this command is bad for wear leveling and takes much longer! SPI Master The i.MX 8M Plus controller has a FlexSPI and an ECSPI IP core included.
  • Page 30 PHYTEC GPIOs The phyBOARD-Pollux has a set of pins especially dedicated as a user I/Os. Those pins are connected directly to i.MX 8M Plus pins and are muxed as GPIOs. They are directly usable in Linux userspace. The processor has organized its GPIOs into five banks of 32 GPIOs each (GPIO1 – GPIO5) and one bank with 32 GPIOs.
  • Page 31 I C Bus The i.MX 8M Plus contains four Multimaster fast-mode I²C modules called I2C1, I2C2, I2C3, and I2C4. PHYTEC boards provide plenty of different I²C devices connected to the I²C modules of the i.MX 8M Plus. This chapter will describe the basic device usage and its DT representation of some of the I²C devices integrated on our phyBOARD-Pollux.
  • Page 32 PHYTEC &i2c1 { clock-frequency = <400000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; pinctrl-1 = <&pinctrl_i2c1_gpio>; sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "okay"; [...] [...] &iomuxc { [...] pinctrl_i2c1: i2c1grp { fsl,pins = <...
  • Page 33 PHYTEC [...] &i2c2 { clock-frequency = <400000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; pinctrl-1 = <&pinctrl_i2c2_gpio>; sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "okay"; [...] [...] &iomuxc { [...] pinctrl_i2c2: i2c2grp { fsl,pins = <...
  • Page 34 The ID page at address 0x59 of the EEPROM is reserved for factory use. Information about the module configuration will be stored here in the future. RTCs can be accessed via /dev/rtc* . Because PHYTEC boards have often more than one RTC, there might be more than one RTC device file. To find the name of the RTC device, you can read its sysfs...
  • Page 35: Usb Host Controller

    = "okay"; [...] Watchdog The PHYTEC i.MX8MP modules include a hardware watchdog that is able to reset the board when the system hangs. This section explains how to enable the watchdog in Linux using systemd to check for system hangs and during reboot. By default, the watchdog is enabled in the Linux kernel but disabled in...
  • Page 36 With the phytec-qt5demo-image, Weston with the phytec-qtdemo is started during boot. The phytec-qtdemo can be stopped with : target$ systemctl stop phytec-qtdemo To start the demo again, run: target$ systemctl start phytec-qtdemo To disable autostart of the demo run: Page 36...
  • Page 37 PHYTEC target$ systemctl disable phytec-qtdemo Weston can be stopped with: target$ systemctl stop weston imx8mp-phyboard-pollux.dtsi backlight1: backlight1 { compatible = "pwm-backlight"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lvds1>; default-brightness-level = <6>; pwms = <&pwm3 0 50000>; power-supply = <&reg_lvds1_reg_en>; enable-gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;...
  • Page 38: Backlight Control

    >; [...] Framebuffer This driver gains access to displays connected to PHYTEC carrier boards by using an emulated framebuffer device /dev/fb0. To run a simple test of the framebuffer feature, execute: fbtest -f /dev/fb0 This will show various test patterns on the display.
  • Page 39: Power Management

    PHYTEC target$ cat /sys/class/backlight/backlight1/max_brightness which will result in: Valid brightness values are 0 to <max_brightness>. To obtain the current brightness level, type: target$ cat /sys/class/backlight/backlight1/brightness you will get for example: Write to the file brightness to change the brightness: target$ echo 0 > /sys/class/backlight/backlight1/brightness turns the backlight off, target$ echo 6 >...
  • Page 40: Suspend To Ram

    PHYTEC You can use to see a graphical overview of the cores and processes: target$ htop To power up the core again, execute: target$ echo 1 > /sys/devices/system/cpu/cpu3/online Suspend to RAM The phyCORE-i.MX8MM supports basic suspend and resume. Different wake-up sources can be used.

Table of Contents