Powergood/Tpm - Clevo W24ABL Service Manual

Schematic Diagrams

POWERGOOD/TPM

Sheet 11 of 33
POWERGOOD/TPM
B - 12 POWERGOOD/TPM
3.3V
U22B
74LVC08PW
4
26 1.1V_PWRGD
6
5
8 SY S_RST#
3.3V
U22A
R775 *10mil_short 74LVC08PW
27 1.8V_PWRGD
1
R776 *0_04
25,28 DDR1.5V_PWRGD
3
2
8,12,20,23 SUSB#
C915 C913
*0.01u_16V_X7R_04 *0.01u_16V_X7R_04
ON
TPM 1.2
U50
26
R814 *10mil_short_04
7,20 LPC_AD0 LAD0
R816 *10mil_short_04 23
7,20 LPC_AD1
LAD1
R817 *10mil_short_04 20
7,20 LPC_AD2
17 LAD2
R815 *10mil_short_04
7,20 LPC_AD3 LAD3
21
7 PCLK_TPM
LCLK
22
R818 *10mil_short_04
7,20 LPC_FRAME# LFRAME#
16
R819 *10mil_short_04
7,16,17,20 BUF_PLT_RST#
27 LRESET#
R820 *10mil_short_04
7,20 SERIRQ SERIRQ
15
7 PCI_CLKRUN# CLKRUN#
R264 *0_04 28
7 SUS_STAT# LPCPD#
TPM_BADD 9
R239 10K_04
3.3VS
TESTBI/BADD
7
R248 *10K_04 TPM_PP
VDD3 PP
D02
1
TPM3001
NC_1
TPM3002 3
NC_2
TPM3003 12
NC_3
8
TESTI
SLB9635TT
Asserted before entering S3
LPC reset timing:
LPCPD# inactive to LRST# inactive 32~96us
HI: ACCESS
TPM _PP
LOW: NORM AL ( Inte rnal PD )
HI: 4E/ 4F H
TPM _BADD
LOW: 2E/ 2F H
D02
C848 *0.1u_16V_Y 5V_04
3.3V
28 PWRGD_VCORE
3.3V
3.3V R774
U22C 10K_04
U22D 74LVC08PW
74LVC08PW 9
12 8
11 10
13
C841
1u_6.3V_Y5V_04
3.3VS
C876 C877 C878 C879
10
VDD1
19 0.1u_16V_Y5V_04 0.1u_16V_Y 5V_04
VDD2
24 0.1u_16V_Y5V_04 1u_16V_X5R_06
VDD3
VDD3
TPM
3.3VS to VDD3 3/9
5
VSB
C880
0.1u_16V_Y5V_04
6 TPM3004
GPIO
2
TPM3005
GPIO2
13 XTALI
XTALI
X12 MC-306_32.768KHz
14 XTALO 4 1
XTALO 3 2
4
GND_1
11
GND_2
18 C881 C882
GND_3 25
GND_4
15p_50V_NPO_04 15p_50V_NPO_04
PCLK_TPM R821 *33_04 C883 *10p_50V_04
3.3VS
TPM_PP R822 *10K_04
TPM_BADD
R823 10K_04
R824 *10K_04
SB_PWROK
R364 *10mil_short
SB_PWRGD 8
R365 *10mil_short SYS_PWROK
ALL_SYS_PWRGD 13,20
R367
*10K_04