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2 5-105-510
5.2.1.
MCH-to-MCH Link
The Maintenance Channel Link (MCHL) provides a direct connection between the Central Control (CC) units in
Control Unit 0 (CU 0) and Control Unit 1 (CU 1). This link is needed for the duplexed operation of the CC. There is a
Maintenance Channel (MCH) circuit on both ends of the link. A CC unit can request its MCH to send instructions to
the MCH in the other CU. These instructions, called slave commands, tell the receiving MCH to read and write its
M S buses, read and write its interface, read its MTC bus, or to clear and set certain status bits. The MCHL is also
used to carry the stop and switch command from one CU to the other CU. These functions are further described in
"Maintenance Channel (MCH)" in this section.
The MCHL interface is identical in the 3B20D and 3B21D computers in that the same format is used in the Dual
Serial Channel (DSCH) interface. There are five signals in the MCHL interface. These five signals are driven
electrically as five differential pairs as shown in Table 5-5 . The REQAP/N pair carries the stop and switch signal
that requests the receiving CC to go on-line. The REQA signal is used separately from the other four signals in the
MCHL that are used for other data transfer and command functions. The CLKA and XCKA signals are used as
timing references for the data. The CLKA signal is an input for received data. The XCKA signal is sent out with the
transmitted data. The data transmission contains an 8-bit start code and can optionally include 32 data bits and 4
parity bits. The data is split in two halves. The high-order bits are sent on the DAHA signal; the low-order bits are
sent on the DALA signal. The data parity bits are used as parity bits in the MCHL. The MCHL protocol uses odd
parity, requiring the 3B21D computer MCH circuits to do parity conversion on these bits.
Figure 5-5 shows the MCHL protocol. Table 5-5 summarizes the MCHL signals. Figure 5-6 is a functional block
diagram of the MCHL.
SIGNAL
TYPE
DAHAP
RS-422
DAHAN
RS-422
DALAP
RS-422
DALAN
RS-422
XCKAP
RS-422
XCKAN
RS-422
CLKAP
RS-422
CLKAN
RS-422
REQAP
RS-422
REQAN
RS-422
Figure 5-5 Maintenance Channel Link (MCHL) Protocol
Table 5-5
Maintenance Channel Link (MCHL) Interface
DIRECTION
/O
Serial link high-order bits, positive phase
/O
Serial link high-order bits, negative phase
/O
Serial link low-order bits, positive phase
/O
Serial link low-order bits, negative phase
N
Serial link clock input, positive phase
N
Serial link clock input, negative phase
OUT
Serial link clock output, positive phase
OUT
Serial link clock output, negative phase
/O
Link stop and switch interrupt, positive phase
/O
Link stop and switch interrupt, negative phase
Copyright © 1999 Lucent Technologies
DESCRIPTION
July 1999
Page 14
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