NEC MultiSync 2A Service Manual page 34

1-6
Blanking circuit
The blanking circuit eliminates horizontal and vertical retrace lines by lowering G1 voltage at the
fly-back time.
1-7 100V
regulation circuit
The 1 OOV regulation circuit regulates DC11 OV, which is generated from the switching power
supply, to 100V and it supplies 100V to the video output amplifier.
2. Deflection System
2-1 Synchronization discriminating circuit
The polarity of VGA sync. signal varies with the mode as shown below:
H.SYNC
VGA 350 LINES POSI
VGA 400 LINES NEGA
VGA 480 LINES NEGA
The synchronization discriminating circuit generates the discrimination signal for control s o that
vertical display size and positive sync. signal become constant.
2-2 Horizontal system
2-2-1 F/V converter circuit
Horizontal sync. signal generated from the synchronization discriminating circuit is input to the
F/V converter IC551 pin 2. The pulse determined by an external resistor and capacitor of pin 7 is
output from pin 3, and it is converted into DC level by the RC integration.
The TP502 voltage is proportional to horizontal sync. signal frequency. The TP502 voltage is
adjusted to 7.9V with VR551 when fh
discriminate frequencies so that an oscillating capacitor, resonance capacitor, H. WIDTH coil,
etc. can be switched over.
2-2-2 Horizontal oscillating circuit and HOLD circuit
The horizontal oscillating circuit consists of an IC451 and external resistor and capacitor. The
IC451 contains VCO, A FC, X-ray protector and sync. separating circuit. The phase of pulse
generated from horizontal sync. discriminating circuit is controlled by IC553, and it is input to
IC451 pin 8. The oscillating circuit is an RC type, and its oscillation frequency is determined by an
external resistor and capacitor of pin 13.
The H. HOLD is adjusted with VR556 when fh
V.SYNC 0807
0806
NEGA ON O F F
POSI O F F ON
NEGA O F F O F F
= 31.5 kHz. This voltage is input to the IC552 comparator to
= 31.5 kHz.
-32-
0808 0809 0810
OFF ON ON
ON O F F ON
ON ON O F F