Logic Level Specifications; Pads - Absolute Maximum Ratings; Standard Gpios - Teli LE910C1-NA Design Manual

Table of Contents

Advertisement

LE910Cx HW User Guide

Logic Level Specifications

Unless otherwise specified, all LE910Cx interface circuits are 1.8V CMOS logic. Only few
specific interfaces (such as MAC, USIM and SD Card) are capable of dual voltage I/O.
The following tables show the specifications of the logic level used in the LE910Cx
interface circuits.
Note: Do not connect LE910Cx digital logic signals directly to OEM
digital logic signals with a level higher than 2.7V for 1.8V CMOS
signals.
4.3.1.
1.8V Pads - Absolute Maximum Ratings
Parameter
Input level on any digital pin when on
Input voltage on analog pins when on
Table 11: Absolute Maximum Ratings - Not Functional
4.3.2.
1.8V Standard GPIOs
Pad
Parameter
V
Input high level
IH
V
Input low level
IL
V
Output high
OH
level
V
Output low level
OL
I
Low-level input
IL
leakage current
I
High-level input
IH
leakage current
R
Pull-up
PU
resistance
R
Pull-down
PD
resistance
C
Input
i
capacitance
Table 12: Operating Range – Interface Levels (1.8V CMOS)
1VV0301298 Rev. 33
Min
Max
1.25V
--
--
0.6V
1.4V
--
--
0.45V
-1
--
--
+1
30
390
30
390
--
5
Page 35 of 128
Not Subject to NDA
Min
-0.3V
+2.16V
-0.3V
+2.16 V
Unit
[V]
[V]
[V]
[V]
[uA]
[uA]
[kΩ]
[kΩ]
[pF]
Max
Comment
No pull-up
No pull-down
2021-06-29

Advertisement

Table of Contents
loading

Table of Contents