Table 51 Evf Bit (Event Flag); Table 52 Eie Bit (Event Interrupt Enable); Table 53 Ovw Bit (Over Write) - Epson RX4111CE Applications Manual

51) EVF bit (Event Flag)
When event occurs, a Time stamp is performed, and EVF is set.

Table 51 EVF bit (Event Flag)

EVF
Write
Read
Note: EVF is not set by SPI-Bus command trigger
2) EIE bit (Event Interrupt Enable)
Control of /INT interrupt output when an event occurs (EVF,"0""1").

Table 52 EIE bit (Event Interrupt Enable)

EIE
Write
3) OVW bit (Over Write)
Control of overwriting of Time stamp record

Table 53 OVW bit (Over Write)

OVW
Write
Figure 34 OVW, pointer operation
RX4111CE
ETM62E-02
Data
When /INT is outputting Low, it is canceled. It is released to Hi-Z.
0
1 Ignored
0 Specified interrupt events are not detected.
Event occasion is detected.
1
(The result is retained until this bit is cleared to zero.)
Data
1) When an event interrupt event occurs, an interrupt signal is not generated
(/INT status remains Hi-z)
0
2) When an event interrupt event occurs, the interrupt signal is canceled.
(/INT status changes from low to Hi-z)
When an event interrupt occurs, an interrupt signal is generated (/INT status
1
changes from Hi-z to low)
Data
0 The recording is stopped with 8-time stamps, and it is not overwritten.
1 Overwrite available
Seiko Epson Corporation
Description
Description
Description
14. How to use
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