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Table 13 Register Table 2
Bank3
Function
Address
0h
No Function
1h
No Function
2h
Power Switch Control
3h
No Function
4h
Time Stamp Control 1
5h
Time Stamp Control 2
6h
Time Stamp Control 3
7h
No Function
8h to Dh
No Function
Eh
No Function
Fh
TEST
Bank4,5,6,7
Function
Address
Time stamp 1/256S
0h
Time Stamp SEC
1h
2h
Time Stamp MIN
Time Stamp HOUR
3h
Time Stamp DAY
4h
5h
Time Stamp MONTH
Time Stamp YEAR
6h
7h
Status stamp
8h
Time stamp 1/256S
9h
Time Stamp SEC
Time Stamp MIN
Ah
Bh
Time Stamp HOUR
Time Stamp DAY
Ch
Time Stamp MONTH
Dh
Eh
Time Stamp YEAR
Status stamp
Fh
After the initial power-up (from 0 V) or in case the VLF bit returns 1, make sure to initialize all registers, before using the RTC.
Be sure to avoid entering incorrect date and time data, as clock operations are not guaranteed when the data or time data is
incorrect. Week data is not need care.
The TEST bit is used by the manufacturer for testing. Be sure to write 0 by initializing before using the RTC. Afterward, be sure to
set 0 when writing
Any bit marked with "z" should be used with a value of 0 after initialization. Writing 1 is ignored.
Any bit marked with "•" is a RAM bit that can be used to read or write any data.
Write '0' to the "-"' mark when writing. The read value is undefined. Please mask the corresponding bit after reading it.
The above table shows only the user registers. Due to functional reasons, RTC has different registers not mentioned above table
which are programmed by the manufacturer. Please make sure to only access above mentioned user registers.
Writing operation is ignored at any bit marked "No Function".
"▲" mark bits are must be cleared to 0. Afterward, be kept in 0, anytime. When writes 1 to "▲", it has possibility of current
consumption is increased.
RX4111CE
ETM62E-02
bit 7
bit 6
bit 5
z
z
z
z
z
z
▲
z
INIEN
z
z
z
z
z
z
z
z
z
z
z
z
z
z
z
z
-
-
-
TEST
z
z
bit 7
bit 6
bit 5
1
2
4
40
20
40
20
20
20
80
40
20
1
2
4
40
20
40
20
20
20
80
40
20
Seiko Epson Corporation
13. Overview of Functions and Registers
bit 4
bit 3
bit 2
z
z
z
z
z
z
z
SWSEL1 SWSEL0 SMPT1
z
z
z
z
EISEL
▲
z
EVDET
TSFUL
TSEMP TSDA2
z
z
z
z
z
-
-
-
z
z
z
bit 4
bit 3
bit 2
8
16
32
10
8
4
10
8
4
10
8
4
10
8
4
10
8
4
10
8
4
VDET
8
16
32
10
8
4
10
8
4
10
8
4
10
8
4
10
8
4
10
8
4
VDET
bit 1
bit 0
z
z
z
z
SMPT0
z
TSCLR
TSRAM
▲
EXST
TSDA1
TSDA0
z
z
z
-
-
z
z
bit 1
bit 0
64
128
2
1
2
1
2
1
2
1
2
1
2
1
XST
64
128
2
1
2
1
2
1
2
1
2
1
2
1
XST
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