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Registers
1. Register table
A
d
d
e r
s
s
A
3
A
2
(
H
e
) x
0
0
0
1
0
0
2
0
0
3
0
0
4
0
1
5
0
1
6
0
1
7
0
1
8
1
0
9
1
0
A
1
0
B
1
0
C
1
1
D
1
1
E
1
1
F
1
1
2. Notes
(1) The counts at addresses 0 to C are all positive logic. Therefore, a register bit that is 1 appears as a high-level signal on
the data bus. Data representation is BCD.
(2) Do not set an impossible date or time in the RTC. If such a value is set, the effect is unpredictable.
(3) When the power is turned on (before the RTC is initialized), the state of all bits is undefined. Therefore, write to all
registers after power-on, to set initial values. For details of the initialization procedure, see "Using the RTC-72421/RTC-
72423" on page 16.
(4) The TEST bit of control register F is used by EPSON for testing. Operation cannot be guaranteed if 1 is written to this bit,
so make sure that it is set to 0 during power-on initialization.
A
1
A
0
R
e
i g
t s
r e
n
a
m
e
0
0
S
1
0
1
S
1
0
1
0
M
1 I
1
1
M
1 I
0
0
0
H
1
0
1
H
1
0
1
0
D
1
1
1
D
1
0
0
0
M
O
1
0
1
M
O
1
0
1
0
Y
1
1
1
Y
1
0
0
0
W
0
1
C
D
3
0
1
0
C
E
1
1
C
F
T
D
a
a t
D
3
D
2
D
1
s
8
s
4
s
2
*
s
4
0
s
2
0
m
8 i
m
4 i
m
2 i
*
m
4 i
0
m
2 i
0
h
8
h
4
h
2
*
P
M
A /
M
h
2
0
d
8
d
4
d
2
*
*
d
2
0
m
o
8
m
o
4
m
o
2
*
*
*
y
8
y
4
y
2
y
8
0
y
4
0
y
2
0
*
w
4
w
2
s -
A
D
J
R I
Q
F
L
A
G
B
U
S
Y
T I
R
P
/ T
1 t
0 t
S
T
N
D
E
S
T
2
4
1 /
2
S
T
O
P
Page-9
C
o
u
t n
R
D
0
(
B
C
D
)
s
1
0
~
9
1
s -
e
c
o
s
1
0
0
~
5
1
0
s -
e
c
o
m
1 i
0
~
9
- 1
m
n i
u
m
1 i
0
0
~
5
1
- 0
m
n i
u
h
1
0
~
9
1
h -
o
r u
h
1
0
0
~
1
r o
2
1
0
h -
o
u
d
1
0
~
9
1
d -
a
y
d
1
0
0
~
3
1
0
d -
a
s y
m
o
1
0
~
9
- 1
m
o
n
m
o
1
0
0
~
1
1
- 0
m
o
n
y
1
0
~
9
1
y -
e
r a
y
1
0
0
~
9
1
0
y -
e
a
w
1
0
~
6
D
a
y
o -
- f
h t
H
O
L
D
C
o
n
r t
M
A
S
K
C
o
n
R
E
S
E
T
C
o
n
e
m
a
k r
s
n
d
d
g i
t i
e r
g
t s i
r e
n
d
s
d
g i
t i
e r
g
t s i
r e
e t
d
g i
t i
e r
g
t s i
r e
e t
s
d
g i
t i
e r
g
t s i
r e
d
g i
t i
e r
g
t s i
r e
s r
d
g i
t i
e r
g
t s i
r e
d
g i
t i
e r
g
t s i
r e
d
g i
t i
e r
g
t s i
r e
h t
d
g i
t i
e r
g
t s i
r e
h t
s
d
g i
t i
e r
g
t s i
r e
d
g i
t i
e r
g
t s i
r e
s r
d
g i
t i
e r
g
t s i
r e
- e
w
e
e
k
e r
g
t s i
r e
l o
e r
g
t s i
r e
D
r t
l o
e r
g
t s i
r e
E
r t
l o
e r
g
t s i
r e
F
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