Ddr2-2 - Clevo M670SRU Service Manual

DDR2-2

M A A [ 0 : 1 3] J D I M M2 A
6 , 9 MA A [ 0: 1 3 ]
M A A 0 1 0 2
A 0
M A A 1 1 0 1
A 1
M A A 2 1 0 0
A 2
M A A 3 9 9
A 3
M A A 4 9 8
A 4
M A A 5 9 7
A 5
M A A 6 9 4
A 6
M A A 7 9 2
A 7
M A A 8 9 3
A 8
M A A 9 9 1
A 9
M A A 1 0 1 0 5
A 1 0/ A P
M A A 1 1 9 0
A 1 1
M A A 1 2 8 9
A 1 2
M A A 1 3 1 1 6
A 1 3
8 6
A 1 4
8 4
A 1 5
M _ B A 2 8 5
6 , 9 M_ B A 2
A 1 6_ B A 2
M _ B A 0 1 0 7
6 , 9 M _B A 0
B A 0
M _ B A 1 1 0 6
6 , 9 M _B A 1 B A 1
M _ C S 0 # 1 1 0
6 M _C S 0 # S 0 #
M _ C S 1 # 1 1 5
6 M _C S 1 # S 1 #
3 0
2 M _C L K _ D D R 0 C K 0
3 2
2 M _C L K _ D D R # 0
C K 0 #
1 6 4
2 M _C L K _ D D R 1 C K 1
1 6 6
2 M _C L K _ D D R # 1
C K 1 #
M _ C K E 0 7 9
6 M _C K E 0 C K E 0
M _ C K E 1 8 0
6 M _C K E 1 C K E 1
M _ C A S # 1 1 3
6 , 9 M _C A S # C A S #
M _ R A S # 1 0 8
6 , 9 M _R A S # R A S #
M _ W E # 1 0 9
6 , 9 M _W E #
W E #
R 9 7 1 0 K _ 0 6 Z 10 0 1 1 9 8
S A 0
R 9 9 1 0 K _ 0 6 Z 10 0 2 2 0 0
S A 1
S MB _ S B C L K 1 9 7
2 , 9 , 1 1, 16 S M B _ S B C LK S C L
S MB _ S B D A T A 1 9 5
2, 9 , 1 1 , 1 6 S MB _S B D A T A
S D A
M _ OD T0 1 1 4
6 M_ O D T 0 OD T 0
M _ OD T1 1 1 9
6 M_ O D T 1
OD T 1
M _D M[ 0. . 7 ] M _ D M 0 1 0
6 , 9 M _ D M [ 0. . 7]
D M 0
M _ D M 1 2 6
D M 1
M _ D M 2 5 2
D M 2
M _ D M 3 6 7
D M 3
M _ D M 4 1 3 0
D M 4
M _ D M 5 1 4 7
D M 5
M _ D M 6 1 7 0
D M 6
M _ D M 7 1 8 5
D M 7
M _ D Q S + 0 1 3
D Q S 0
M_ D Q S + [ 0 . . 7 ] M _ D Q S + 1 3 1
6 , 9 M _D QS +[ 0 . . 7 ] D Q S 1
M _ D Q S + 2 5 1
D Q S 2
M _ D Q S + 3 7 0
D Q S 3
M _ D Q S + 4 1 3 1
D Q S 4
M _ D Q S + 5 1 4 8
D Q S 5
M _ D Q S + 6 1 6 9
D Q S 6
M _ D Q S + 7 1 8 8
D Q S 7
M _ D Q S -0 1 1
D Q S 0 #
M_ D Q S -[ 0 . . 7 ] M _ D Q S -1 2 9
6, 9 M _ D Q S -[ 0 . . 7 ]
D Q S 1 #
M _ D Q S -2 4 9
D Q S 2 #
M _ D Q S -3 6 8
D Q S 3 #
M _ D Q S -4 1 2 9
D Q S 4 #
M _ D Q S -5 1 4 6
D Q S 5 #
M _ D Q S -6 1 6 7
D Q S 6 #
M _ D Q S -7 1 8 6
D Q S 7 #
C A 01 1 5 -2 00 N 0 2
2 M_ C L K _D D R 0 2 M _ C L K _ D D R 1
C 8 7 4
* 1 0P _5 0 V _ 0 6
2 M_ C L K _D D R # 0 2 M _ C L K _ D D R # 1
M961011
MD _ [ 0: 63 ]
M D _ [ 0 : 6 3] 6, 9
5 M D _ 0
D Q 0
7 M D _ 1
D Q 1
1 7 M D _ 2
D Q 2
1 9 M D _ 3
D Q 3
4 M D _ 4
D Q 4
6 M D _ 5
D Q 5
1 4 M D _ 6
D Q 6
1 6 M D _ 7
D Q 7
2 3 M D _ 8
D Q 8
2 5 M D _ 9
D Q 9
3 5 M D _ 1 0 1 . 8 V
D Q 1 0
3 7 M D _ 1 1
D Q 1 1
2 0 M D _ 1 2 1 12
D Q 1 2
2 2 M D _ 1 3 1 11
D Q 1 3
3 6 M D _ 1 4 1 17
D Q 1 4
3 8 M D _ 1 5
D Q 1 5
4 3 M D _ 1 6
D Q 1 6
4 5 M D _ 1 7 1 18
D Q 1 7
5 5 M D _ 1 8
D Q 1 8
5 7 M D _ 1 9
D Q 1 9
4 4 M D _ 2 0
D Q 2 0
4 6 M D _ 2 1 1 03
D Q 2 1
5 6 M D _ 2 2
D Q 2 2
5 8 M D _ 2 3 1 04
D Q 2 3
6 1 M D _ 2 4
D Q 2 4
6 3 M D _ 2 5 1 99
D Q 2 5 3 . 3 V S
7 3 M D _ 2 6
D Q 2 6
7 5 M D _ 2 7 C 5 9 1
D Q 2 7
6 2 M D _ 2 8 1 20
D Q 2 8
6 4 M D _ 2 9 . 1 U _ 1 6 V _0 6
D Q 2 9
7 4 M D _ 3 0
D Q 3 0
7 6 M D _ 3 1 1 63
D Q 3 1
1 23 M D _ 3 2
D Q 3 2
1 25 M D _ 3 3 S D R E F C
D Q 3 3
1 35 M D _ 3 4
D Q 3 4
1 37 M D _ 3 5 2 01
D Q 3 5
1 24 M D _ 3 6 2 02
D Q 3 6
1 26 M D _ 3 7
D Q 3 7
1 34 M D _ 3 8
D Q 3 8
1 36 M D _ 3 9
D Q 3 9
1 41 M D _ 4 0 1 33
D Q 4 0
1 43 M D _ 4 1 1 83
D Q 4 1
1 51 M D _ 4 2
D Q 4 2
1 53 M D _ 4 3
D Q 4 3
1 40 M D _ 4 4
D Q 4 4
1 42 M D _ 4 5 1 84
D Q 4 5
1 52 M D _ 4 6
D Q 4 6
1 54 M D _ 4 7
D Q 4 7
1 57 M D _ 4 8
D Q 4 8
1 59 M D _ 4 9 1 21
D Q 4 9
1 73 M D _ 5 0 1 22
D Q 5 0
1 75 M D _ 5 1 1 96
D Q 5 1
1 58 M D _ 5 2 1 93
D Q 5 2
1 60 M D _ 5 3
D Q 5 3
1 74 M D _ 5 4
D Q 5 4
1 76 M D _ 5 5
D Q 5 5
1 79 M D _ 5 6
D Q 5 6
1 81 M D _ 5 7
D Q 5 7
1 89 M D _ 5 8
D Q 5 8
1 91 M D _ 5 9
D Q 5 9
1 80 M D _ 6 0
D Q 6 0
1 82 M D _ 6 1
D Q 6 1
1 92 M D _ 6 2
D Q 6 2
1 94 M D _ 6 3
D Q 6 3
L ay ou t No te :P la ce t he se C ap s ne ar S o- Di mm 0
1 . 8 V
DDRVR EF GEN. & DEC OUPLING
R 10 5
Trac e Width 12 Mil
Spac e 20 Mi l
7 5 _1 % _ 0 6
1 . 8 V
C 1 0 3 C 10 2 C 8 2 R 10 4 C 9 6
. 1 U _ 1 6 V _ 0 4 . 1U _ 16 V _ 0 4 . 1 U _ 1 6 V _ 04 7 5 _1 % _ 0 6
. 1 U _ 1 6 V _0 6
C 8 7 5
*1 0 P _ 5 0V _0 6
MA A 6 R P 3 8
MA A 7 7
MA A 11 6
JD I M M2 B M_ C K E 3 5
6 , 9 M_ C K E 3
18 MA A 8 R P 6 1
V D D 1 V S S 16
24 MA A 9 2
V D D 2 V S S 17
41 MA A 12 3
V D D 3 V S S 18
96 53 M_ C K E 2 4
V D D 4 V S S 19 6 , 9 M_ C K E 2
95 42 M_ O D T 3 R P 4 1
6 , 9 M_ O D T 3
V D D 5 V S S 20
54 M_ C A S # 2
V D D 6 V S S 21
81 59 M_ W E # 3
V D D 7 V S S 22
82 65 M_ B A 0 4
V D D 8 V S S 23
87 60 MA A 1 R P 5 1
V D D 9 V S S 24
66 MA A 10 2
V D D 10 V S S 25
88 12 7 MA A 3 3
V D D 11 V S S 26
13 9 MA A 5 4
V D D 12 V S S 27
12 8 M_ C K E 0 R 1 0 3
V S S 28
14 5 M_ C K E 1 R 1 0 2
V D D S P D V S S 29
16 5 M_ C S 0# R 1 0 1
V S S 30
83 17 1 M_ C S 1# R 1 0 7
N C 1 V S S 31
17 2 M_ O D T 0 R 1 0 0
N C 2 V S S 32
50 17 7 M_ O D T 1 R 1 0 6
N C 3 V S S 33
69 18 7 MA A 13 R P 1 8
N C 4 V S S 34
17 8 M_ O D T 2 7
N C T E S T V S S 35 6 , 9 M_ O D T 2
19 0 M_ C S 2# 6
6 , 9 M_ C S 2 #
V S S 36
1 9 M_ R A S # 5
V R E F V S S 37
21
V S S 38
33 M_ C S 3# R 7 8
G N D 0 V S S 39 6 , 9 M_ C S 3 #
15 5 M_ B A 2 R 6 7 0
G N D 1 V S S 40
34 M_ B A 1 R P 2 8
V S S 41
13 2 MA A 0 7
V S S 42
47 14 4 MA A 2 6
V S S 1 V S S 43
15 6 MA A 4 5
V S S 2 V S S 44
16 8
V S S 3 V S S 45
77 2
V S S 4 V S S 46
12 3
V S S 5 V S S 47
48 15 1 . 8 V
V S S 6 V S S 48
27
V S S 7 V S S 49
78 39
V S S 8 V S S 50
71 14 9
V S S 9 V S S 51
72 16 1
V S S 1 0 V S S 52
28
V S S 1 1 V S S 53
40
V S S 1 2 V S S 54
13 8
V S S 1 3 V S S 55
15 0
V S S 1 4 V S S 56
8 16 2
V S S 1 5 V S S 57
C A 0 1 1 5 -20 0 N 0 2
S D R E F C
C 9 8 C 97
2 . 2 U _ 6 . 3 V _ 06
2 . 2 U _6 . 3 V _ 0 6
Schematic Diagrams
0. 9V S
C 3 1 *1 5 0 U _ 4 V _ B
C 4 7 1 50 U _4 V _ B
1 4 7_ 8 P 4 R _ 0 4 C 9 1 . 1 U _1 6 V _ 0 4
2
3 C 9 2 . 1 U _1 6 V _ 0 4
4
8 4 7_ 8 P 4 R _ 0 4 C 8 4 . 1 U _1 6 V _ 0 4
7
6 C 5 6 . 1 U _1 6 V _ 0 4
5
8 4 7_ 8 P 4 R _ 0 4 C 5 5 . 1 U _1 6 V _ 0 4
7
6 C 5 4 . 1 U _1 6 V _ 0 4
5
8 4 7_ 8 P 4 R _ 0 4 C 5 3 . 1 U _1 6 V _ 0 4
7
6 C 5 2 . 1 U _1 6 V _ 0 4
5
47 _ 0 4 C 5 1 . 1 U _1 6 V _ 0 4
Sheet 10 of 40
47 _ 0 4
47 _ 0 4 C 5 0 . 1 U _1 6 V _ 0 4
47 _ 0 4
47 _ 0 4 C 4 2 . 1 U _1 6 V _ 0 4
DDR2-2
47 _ 0 4
1 4 7_ 8 P 4 R _ 0 4 C 8 5 . 1 U _1 6 V _ 0 4
2
3 C 4 1 . 1 U _1 6 V _ 0 4
4
C 4 0 . 1 U _1 6 V _ 0 4
47 _ 0 4
47 _ 0 4 C 3 9 . 1 U _1 6 V _ 0 4
1 4 7_ 8 P 4 R _ 0 4
2 C 3 8 . 1 U _1 6 V _ 0 4
3
4 C 3 7 . 1 U _1 6 V _ 0 4
C 1 0 5 . 1 U _ 16 V _ 0 6
C 9 5 . 1 U _ 16 V _ 0 6
C 9 9 . 1 U _ 16 V _ 0 6
C 8 7 . 1 U _ 16 V _ 0 6
C 1 0 1 . 1 U _ 16 V _ 0 6
C 1 0 0 . 1 U _ 16 V _ 0 6
C 1 0 4 . 1 U _ 16 V _ 0 6
C 7 4 . 1 U _ 16 V _ 0 6
C 8 0 1 0 U _ 1 0 V _ 0 8
C 9 0 1 0 U _ 1 0 V _ 0 8
C 9 3 1 0 U _ 1 0 V _ 0 8
C 7 9 1 0 U _ 1 0 V _ 0 8
C 89
1 2 33 0 U _ 6 . 3 V _ D
C 88
1 2 *3 3 0U _ 6. 3 V _ D
C 7 3 1 0 U _ 1 0 V _ 0 8
DDR2-2 B - 11