disconnect signal source from BNC connector first. If you do
not so, signal source may fail.
The settings of range setting etc. are unsettled when the PC
is started.
Please adjust the input impedance to 50Ω when the signal
reflection etc. are anxious.
However, the effect cannot be achieved except for cases
such as setting the output impedance of the signal source to
50Ω, and setting the characteristic impedance of the used
connector/cable etc. to 50Ω.
Connecting the External Trigger I/O Signal
This section shows an example of how to connect external
trigger I/O signals (post trigger input signals and sampling clock
input signal) using BNC cable.
User can use an optional BNC cable (BNC-Bxxx) to connect
your external devices to BNC connector of TRG.
External trigger I/O signal is the positive logical I/O.
These external trigger I/O signals are 3.3VLVTTL level not only
for the input but also for the output.
The external trigger I/O signal also can be used as BNC
connector of TRG.
Therefore, it can be only used as either the input or the output.
Switching I/O can be done by the software.
Connecting the External Trigger Input
3.3V
TRG
BOARD
10kΩ
SN74LVC245A
Trigger
50Ω
Input
Digital Ground
Connecting the External Trigger Output
3.3V
TRG
BOARD
10kΩ
SN74LVC245A
Trigger
50Ω
Output
Digital Ground
CAUTION
Do not connect any output signal to the analog or digital
ground. Do not interconnect outputs. Doing either can
cause a malfunction.
The signal input of 5VTTL/5VCOMOS is possible.
The input is the default at startup.
Connecting the Reference Clock I/O Signal
This section shows an example of how to connect reference
clock I/O signals using BNC cable.
User can use an optional BNC cable (BNC-Bxxx) to connect
your external devices to CLK. External trigger I/O signal is the
positive logical I/O. All the I/O signals are 3.3VLVTTL level.
In addition, the reference clock I/O signal also can be used as
BNC connector of CLK. Therefore, it can be only used as either
the input or the output.
Switching I/O can be done by the software.
Connecting the Reference Clock Input
CLK
BOARD
Reference
50Ω
CLK (IN)
Digital Ground
DIG-100M1002-PCI
Shield cable
Target
Target
Shield cable
Shield cable
Target
Connecting the Reference Clock Output
CLK
BOARD
Reference
CLK (OUT)
600 Ω @10MHz Typ
Digital
Ground
CAUTION
Do not connect any output signal to the analog or digital
ground. Do not interconnect outputs. Doing either can
cause a malfunction.
The input is the default at startup.
The reference clock is a period signal that becomes the
standard of the sampling period.
It is possible to expand the number of channels by the
synchronization between external instrument or another board
with the same type by the reference clock, and measure the
mixed signal by the synchronization between other
measurement instrument.
Moveover, it is also used in the case of performing sampling at
a more accurate period supplied by frequency standards etc.
Connecting the Reference Clock
Input
Connector
Input circuit
CLK can be selected besides the reference clock from outside.
Output
Connector
Output circuit
Synchronization Control Connectors
SC Connectors
Controlling simultaneous operations between boards or
controlling in sync with events is in part dependent on software
performance. In order to enhance the reliability of the entire
system and to solve these problems, the board is equipped
with SC (Synchronization Control) connectors (CN6, CN7).
Connecting the SC connectors allows boards of the same or
different models to operate in sync with one another.
From the boards connected with the SC cable, select one
master board and use others as slaves. On the master board,
set the signal to be supplied to the slave boards with the
software. On the slave boards, the signal from the master
board can be set to either the pacer clock operation start or
stop factor.
All board operations can also be stopped with a stop request
from the master in case of an error, for example, or when
requested from a slave board. A maximum of 16 boards can
be connected including the master.
For more information on the setup procedure, see the driver
software online help.
Example 1: When sampling clock start and stop
requirements are set the same for multiple
boards
In order to synchronize master sampling clock start and stop
with slave boards you can build a synchronous system which
does not depend on software processing capabilities.
If the board model is the same, data remains synchronized
among boards even when channels are expanded. When
board models are different, data still remains compatible since
sampling clock start and stop are dependent on the master.
(1)
Connect the SC cable.
(2)
Designate master/slave with the software.
Ver.1.03
Target
Shield cable
CLK
PLL circuit
AD converter
CLK
PLL circuit
Oscillator
5
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