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Enable/disable the generation of ACPI_PPC, _PSS, and _PCT objects.
ACPI SRAT Table
Enable or Disable the building of ACPI SRAT Table.
3-12-2 Memory Configuration
CMOS Setup Utility-Copyright(C)1985-2005 American Megatrends. Inc.
DRAM Timing Mode
Memory CLK:
CAS Latency (Tcl):
RAS/CAS Delay(Trcd):
Row Precharge Time(Trp):
Min Active RAS(Trrd):
RAS/RAS Delay(Trrd):
Row Cycle(Trc)
Write Recover Time(Twr)
Bank Interleaving
Channel Interleaving
Enabled clock to All DIMMs
Mem Clk Tristate C3/ATL VID
Memory Hole Remapping
DCT Unganged Mode
Power Down Enabled
↑↓ : Move
Enter: Select
F5: Discard Charges
Bank Interleaving
Use this item to enable bank memory interleaving. The optional settings are: Disabled;
Auto.
Enable Clock to ALL DIMMs
Enable unused clocks to DIMMS when memory slots are not populated.
Mem CLK Tristate C3 / Alt VID.
Enable and disable Mem CLK Tri-stating during C3 and Alt VID
Memory Hole Remapping
Enable Memory Remapping around Memory Hole.
DCT Unganged Mode
This allows selection of unganged DRAM MODE (64- bit width).
Auto=Ganged Mode; Always= Unganged Mode.
Power Down Enable
Enable or Disable DDR power down mode.
Memory Configuration
Auto
800MHz, N/A
6CLK N/A
6CLK, N/A
6 CLK, N/A
15CLK, N/A
4CLk, N/A
21 CLK, N/A
6CLK, N/A
Auto
XOR of Address b
Disabled
Disabled
Enabled
Always
Enabled
+/-/: Value
F10: Save
F6: Standard Defaults
33
Help Item
Options
Auto
DCT0
DCT1
Both
ESC: Exit
F1: General Help
F7: Optimized Defaults
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