TYAN Thunder n6550EX Manual page 120

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Feature
NorthBridge Chipset Configuration
RAS/CAS Delay
(Trcd)
Min Active RAS
(Tras)
Row Precharge
Time (Trp)
RAS/RAS Delay
(Trrd)
Row Cycle (Trc)
Option
When DRAM is refreshed, both
rows and columns are addressed
separately. This setup item allows
you to determine the timing of the
Read only
transition from RAS (row address
strobe) to CAS (column address
strobe). The less the clock cycles,
the faster the DRAM performance.
This setting allows you to select the
number of clock cycles allotted for
the RAS pulse width, according to
Read only
DRAM specifications. The less the
clock cycles, the faster the DRAM
performance.
This item controls the number of
cycles for Row Address Strobe
(RAS) to be allowed to precharge.
If insufficient time is allowed for the
Read only
RAS to accumulate its chage before
DRAM refresh, refresh may be
incomplete and DRAM may fail to
retain data. This item applies only
when synchronous DRAM is
installed in the system.
Auto uses hardware compensation
values. Other values add to or
Read only
subtract from hardware generated
value. Recommended setting is
Auto.
Bits 7-4. RAS#-active to RAS#-
Read only
active or auto refresh of the same
bank.
114
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