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Panasonic KX-TD612NE Service Manual page 14

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CPU circuit is mainly composed of following parts. / 16 bit CPU
(IC100) / ROM (IC102, IC103, IC104, IC105) / RAM (IC106, IC107) /
Gate Array (IC101) etc. /
Circuit Operation:
CPU(IC100) controls the programs in ROM (IC102, IC103, IC104,
IC105), that is, the system. / RAM (IC104, IC105) is backed up by
back-up battery (BAT1), and keeps system data. / Gate Array is
equipped with following function.
(a) TSW (Time division Switch) Controller Function / (b) Clock
Function / (c) Tone Generator Detection Processor / (d) Timer
Counter / (e) Parallel I/O Port / (f) PCM Highway Controller
Function / (g) APT Data Communication Circuit / (h) DPT Data
Communication Circuit / (i) HDLC Controller /
(a) TSW (time Division Switch) Controller Function / Inside of G/A,
four PCM highway are installed. One PCM highway can have 32
channels of 8 bit PCM data, therefore maximum 128 channels of
PCM data are available. Followings are the assignments of each
highway. / HW0: Conference Circuit, Tone-DTMF Generator / HW1:
ISDN#1~#3, Paging, Music on hold, Door-phone, Option / HW2:
EXT#1~#8(DPT), EXT#1~#4(APT, SLT) / HW3: EXT#5~#8(APT, SLT)
/
(b) Clock Function / This function supplies a real time clock to the
system. This function has its own power source, and is backed up
by battery. /
(c) Tone Generator Detection / This is signal processor to use
following function
1. Three Persons Conference / Conference function is for enabling the three person's
conference. This function is connected with HWS0 of the down highway and HWR0 of the up
highway. After the voice data which are transferred to HWS0 at TSW are processed with the
summation, and represented to HWR0 and transferred at TSW again. This function covers 3-
person 6-conference. / 2. Tone Generator Function / Tone Generator Function presents 4 kinds
of the call progress tone and 2 channels of the DTMF tone to HWS0 of the down highway. /
(d) Timer Counter / The timer counter, its basic frequency is
16.384 MHz, is composed of Watchdog timer, and other kinds of
timer. /
(e) Parallel I/O Port / Gate Array (IC101) is composed of system
port and port group #A~#F, which can be able to access by 8 bit,
14

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