DFI AL9A2 User Manual page 19

Serial Interface Signals Descriptions
Signal Pin#
SER0_TX A98
SER0_RX A99
SER1_TX A101
SER1_RX A102
Miscellaneous Signal Descriptions
Signal Pin#
I2C_CK B33
I2C_DAT B34
SPKR B32
WDT B27
FAN_PWMOUT B101
FAN_TACHIN B102
TPM_PP A96
Power and System Management Signals Descriptions
Signal Pin#
PWRBTN# B12
SYS_RESET# B49
CB_RESET# B50
PWR_OK B24
SUS_STAT# B18
SUS_S3# A15
SUS_S4# A18
SUS_S5# A24
WAKE0# B66
WAKE1# B67
BATLOW# A27
Chapter 3 Hardware Installation
Chapter 3
Pin Type Pwr Rail /Tolerance AL9A2
5V / 12V(design 3.3v~5V
O CMOS
tolerant)
5V / 12V(design 3.3v~5V
I CMOS
tolerant)
5V / 12V(design 3.3v~5V
O CMOS
tolerant)
5V / 12V(design 3.3v~5V
I CMOS
tolerant)
Pin Type Pwr Rail /Tolerance AL9A2
I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K to 3V3SB
I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K to 3V3SB
O CMOS 3.3V / 3.3V PU 10K to 3V3SB
O CMOS 3.3V / 3.3V
O OD CMOS 3.3V / 12V
I OD CMOS 3.3V / 12V
I CMOS 3.3V / 3.3V NC
Pin Type Pwr Rail /Tolerance AL9A2
I CMOS 3.3V Suspend/3.3V PU 10K to 3V3SB
I CMOS 3.3V Suspend/3.3V PU 4.7K to 3V3SB
O CMOS 3.3V Suspend/3.3V
I CMOS 3.3V / 3.3V PU 10K to 3.3VSB
O CMOS 3.3V Suspend/3.3V
O CMOS 3.3V Suspend/3.3V
O CMOS 3.3V Suspend/3.3V
O CMOS 3.3V Suspend/3.3V
I CMOS 3.3V Suspend/3.3V PU 1K to 3.3VSB
I CMOS 3.3V Suspend/3.3V PU 1K to 3.3VSB
I CMOS 3.3V Suspend/ 3.3V PU 4.7K to 3.3VSB
Carrier Board Description
PD 4.7K General purpose serial port 0 transmitter
General purpose serial port 0 receiver
PD 4.7K General purpose serial port 1 transmitter
General purpose serial port 1 receiver
Carrier Board Description
General purpose I2C port clock output
General purpose I2C port data I/O line
Output for audio enunciator - the "speaker" in PC-AT systems.
This port provides the PC beep signal and is mostly intended for
debugging purposes.
Output indicating that a watchdog time-out event has occurred.
Fan speed control. Uses the Pulse Width Modulation (PWM) technique to control the fan's RPM.
Fan tachometer input for a fan with a two pulse output.
Trusted Platform Module (TPM) Physical Presence pin. Active high.
TPM chip has an internal pull down. This signal is used to indicate
Physical Presence to the TPM.
(NC for AL9A2)
Carrier Board Description
A falling edge creates a power button event. Power button events can
be used to bring a system out of S5 soft off and other suspend states,
as well as powering the system down.
Reset button input. Active low request for Module to reset and reboot.
May be falling edge sensitive. For situations when SYS_RESET# is
not able to reestablish control of the system, PWR_OK or a power
cycle may be used.
Reset output from Module to Carrier Board. Active low. Issued by
Module chipset and may result from a low SYS_RESET# input, a low
PWR_OK input, a VCC_12V power input that falls below the minimum
specification, a watchdog timeout, or may be initiated by the Module
software.
Power OK from main power supply. A high value indicates that the
power is good. This signal can be used to hold off Module startup to
allow Carrier based FPGAs or other configurable devices time to be
programmed.
Indicates imminent suspend operation; used to notify LPC devices.
Indicates system is in Suspend to RAM state. Active low output. An
inverted copy of SUS_S3# on the Carrier Board may be used to
enable the non-standby power on a typical ATX supply.
Indicates system is in Suspend to Disk state. Active low output.
Indicates system is in Soft Off state.
PCI Express wake up signal.
General purpose wake up signal. May be used to implement wake-up
on PS2 keyboard or mouse activity.
Indicates that external battery is low.
This port provides a battery-low signal to the Module for orderly
transitioning to power saving or power cut-off ACPI modes.
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