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5. System Diagram
5. System Diagram
5.1. Block Diagram
C I S
16p
5p
16p
Pol ygon M ot or
L S U
9p
LD B¡¯ d
4p
U S B H O S T
U S B D E V I C E
D I R E C T
5p
2p
T2 clutch
+24V /+5V
14p
S M P S
C ont r olSi gnal
FuserAC
2p
LAM P
F U S E R
2p
Ther m i st or
N et ew or k m odelonl y
14p
L A N
3p
C R U M
C R U M Y
W - L A N M o d ule
Jo i n t
3p
&
C R U M M
W i r el ess M odelonl y
O uter
3p
TE M P .
C R U M C
&
3p
O P C K E Y
C R U M K
5-1
Bl ock D i agram
SL -C 480
seri es
M ai n Board
Cortex-A9
800MHz
Cortex-R4
400MHz
A 2 0 0 0
DDR3
RAM controller
128MB
GPIO
MAC
ADC 8CH
LSU
UART
EEPROM
controller
SD A
SC L
32KB
I2C
HPVC
C O N TR O L
A4984
Step Motor
PLL
Image Processor
Nand
Local controller
Flash
128MB
USB 2.0
USB 3.0
C LO C K
G EN ER ATO R
U SB H _C LK
R EF_C LK
M C LK
SD I O
12M H z
10p
4i n1 O nl y
12p
M O D E M
S peaker
2p
6p
2p
F ro n t C o ver o pen
H V P S
2p
R ear C o ver o pen
T1
4p
W aste To n er
T2
TX & R X
27p
C H A R G E R
D eve S upply
2p
D eve B i as
F A N
F A N
D eve D r. B lad e
3p
E X I T sen so r
2p
E R A S E R L A M P
3p
P A P E R P O S I TI O N S E N S O R
4i n1 O nl y
3p
P A P E R D E TE C TI O N S E N S O R
A D F JO I N T P B A
3p
13p
A D F C O V E R O P E N S E N S O R
4p
A D F M O TO R
3p
O utbi n full sen so r
O P E P A N E L
3p
13p
S C A N H O M E S E N S O R
L C D / M I C O M
3p
S can m o to r
10p
B L D C
M o to r
24p
( M A I N )
2p
D E V E clutch
2p
P i ckup clutch
2p
R eg i clutch
2p
I TB clutch
C o n n ecti o n
6p
3p
I / F B ¡¯ d
E m pty sen so r
3p
R eg i sen so r
5p
I TB H O M E sen so r
& I n n er TE M P .
3p
D E V E H O M E sen so r
5p
C TD S E N S O R
N C
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