Quectel SC20-WL Hardware Design page 7

Smart Wi-Fi Module Series
SC20-WL Hardware Design
Figure Index
FIGURE 1: FUNCTIONAL DIAGRAM ............................................................................................................... 17
FIGURE 2: PIN ASSIGNMENT (TOP VIEW)..................................................................................................... 19
FIGURE 3: VOLTAGE DROP SAMPLE ............................................................................................................. 30
FIGURE 4: POWER SUPPLY ........................................................................................................................... 30
FIGURE 5: REFERENCE CIRCUIT OF POWER SUPPLY .............................................................................. 31
FIGURE 6: TURN ON THE MODULE USING DRIVING CIRCUIT ................................................................... 32
FIGURE 7: TURN ON THE MODULE USING KEYSTROKE ........................................................................... 32
FIGURE 8: TIMING OF TURNING ON MODULE ............................................................................................. 33
FIGURE 9: TIMING OF TURNING OFF MODULE ........................................................................................... 34
FIGURE 10: RTC POWERED BY COIN CELL ................................................................................................. 34
FIGURE 11: RTC POWERED BY CAPACITOR ................................................................................................ 34
FIGURE 12: REFERENCE DESIGN FOR BATTERY CHARGING CIRCUIT ................................................... 36
FIGURE 13: USB INTERFACE REFERENCE DESIGN (OTG IS NOT SUPPORTED) ................................... 37
FIGURE 14: USB INTERFACE REFERENCE DESIGN (OTG IS SUPPORTED) ............................................ 38
FIGURE 15: REFERENCE CIRCUIT WITH LEVEL TRANSLATOR CHIP (FOR UART1) ............................... 39
FIGURE 16: RS232 LEVEL MATCH CIRCUIT (FOR UART1) .......................................................................... 40
FIGURE 17: REFERENCE CIRCUIT FOR SD CARD INTERFACE ................................................................. 41
FIGURE 18: REFERENCE CIRCUIT FOR MOTOR CONNECTION ................................................................ 47
FIGURE 19: REFERENCE CIRCUIT DESIGN FOR LCM INTERFACE ........................................................... 49
FIGURE 20: REFERENCE DESIGN FOR BACKLIGHT DIRVING CIRCUIT ................................................... 50
FIGURE 21: REFERENCE CIRCUIT DESIGN FOR TP INTERFACE .............................................................. 51
FIGURE 22: REFERENCE CIRCUIT DESIGN FOR REAR CAMERA INTERFACE ........................................ 53
FIGURE 23: REFERENCE CIRCUIT DESIGN FOR FRONT CAMERA INTERFACE ...................................... 54
FIGURE 24: REFERENCE CIRCUIT DESIGN FOR MICROPHONE INTERFACE ......................................... 58
FIGURE 25: REFERENCE CIRCUIT DESIGN FOR RECEIVER INTERFACE ................................................ 58
FIGURE 26: REFERENCE CIRCUIT DESIGN FOR HEADPHONE INTERFACE ........................................... 59
FIGURE 27: REFERENCE CIRCUIT DESIGN FOR LOUDSPEAKER INTERFACE ....................................... 59
FIGURE 28: REFERENCE CIRCUIT DESIGN FOR EMERGENCY DOWNLOAD INTERFACE ..................... 60
FIGURE 29: REFERENCE CIRCUIT DESIGN FOR Wi-Fi/BT ANTERNNA ..................................................... 65
FIGURE 30: MICROSTRIP LINE DESIGN ON A 2-LAYER PCB ...................................................................... 66
FIGURE 31: COPLANAR WAVEGUIDE LINE DESIGN ON A 2-LAYER PCB .................................................. 66
FIGURE 32: COPLANAR WAVEGUIDE LINE DESIGN ON A 4-LAYER PCB (LAYER 3 AS REFERENCE
GROUND) .......................................................................................................................................................... 67
FIGURE 33: COPLANAR WAVEGUIDE LINE DESIGN ON A 4-LAYER PCB (LAYER 4 AS REFERENCE
GROUND) .......................................................................................................................................................... 67
FIGURE 34: DIMENSIONS OF THE U.FL-R-SMT CONNECTOR (UNIT: MM) ................................................ 68
FIGURE 35: MECHANICAL PARAMETERS OF U.FL-LP CONNECTORS ...................................................... 69
FIGURE 36: SPACE FACTOR OF MATED CONNECTORS (UNIT: MM) ......................................................... 69
FIGURE 37: MODULE TOP AND SIDE DIMENSIONS ..................................................................................... 74
FIGURE 38: MODULE BOTTOM DIMENSIONS (TOP VIEW) ......................................................................... 75
FIGURE 39: RECOMMENDED FOOTPRINT (TOP VIEW) .............................................................................. 76
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