Quectel SC20-WL Hardware Design page 39

VBAT
1.0uH
C1
10uF
GPIO
VBAT
USB_VUSB
USB_DM
USB_DP
USB_ID
Module
Figure 14: USB Interface Reference Design (OTG is Supported)
SC20-WL supports OTG protocol. If OTG function is needed, please refer to the above figure for the
reference design. AW3605DNR is a high efficiency DC-DC chip manufactured by AWINIC, and users can
choose according to their own demands.
In order to ensure USB performance, please comply with the following principles while designing USB
interface.

It is important to route the USB signal traces as differential pairs with total grounding. The impedance
of USB differential trace is 90Ω.

Keep the ESD protection devices as close as possible to the USB connector. Pay attention to the
influence of junction capacitance of ESD protection devices on USB data lines. Typically, the
capacitance value should be less than 2pF.

Do not route signal traces under crystals, oscillators, magnetic devices and RF signal traces. It is
important to route the USB differential traces in inner-layer with ground shielding on not only upper
and lower layers but also right and left sides.

Make sure the trace length difference between USB_DM and USB_DP is not exceeding 6.6mm.
Table 7: USB Trace Length inside the Module
Pin Signal
13 USB_DM
14 USB_DP
SC20-WL_Hardware_Design
L1
4
SW
5
VIN
AW3605DNR
1
EN
R1
10K
U1
C3
100nF
Length (mm)
29.43
29.36
D5
7
VOUT
8
VOUT
C2
6
NC
22uF/
10V
D3 D4
D1 D2
ESD ESD ESD ESD
Length Difference (DP-DM)
Smart Wi-Fi Module Series
SC20-WL Hardware Design
1
VUSB
2
USB_DM
3
USB_DP
4
USB_ID
5
GND
-0.07
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