THine CEL THC63LVD1023B Quick Start Manual

THAN0185_Rev.1.20_E
THC63LVD1023B / THC63LVD1024 Evaluation Kit
1. General Description
THEVA1023B and THEVA1024 are designed to evaluate THC63LVD1023B/THC63LVD1024 for
transmission video data.
THC63LVD1023B and THC63LVD1024 chipset can transmit 67bit data via dual channel LVDS.
The maximum input clock frequency of THC63LVD1023B is 160MHz, and the maximum output clock
frequency of THC63LVD1024 is 135MHz at Dual in / Single out mode.
2. Features
Common Features
・Low power single 3.3V CMOS design
・Power down mode
・Wide dot clock range suited for TV signal(480i to 1080p), PC signal(VGA to QXGA)
・PLL requires no external components
・Clock edge selectable
THC63LVD1023B
・Single/Dual TTL in, Single/Dual LVDS out
・Double Edge Input(Single in/Dual out Mode)
・Input Port Switch for Single TTL in/Dual out
・Asynchronous Dual TTL in / Dual LVDS out
・3 LVDS Data Mapping Modes
・Pseudo Random Pattern Generation Circuit
・Support Reduced Swing LVDS for Lower EMI
・LQFP 144 Pin
3. Overview
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LVDS Dual Link Evaluation Board
Parts Number: THEVA1023B, THEVA1024
(a)THEVA1023B
Figure 1 THEVA1023B and THEVA1024
THC63LVD1024
・Single/Dual LVDS in, Single/Dual TTL out
・Double Edge Output
・50% Output Clock Duty Cycle
・TTL Clock Output Timing Programmable
・2 Output Data Mapping Modes
・LQFP 144 pin + Exposed Pad
(b)THEVA1024
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