Cypress Traveo S6J32E Series Manual
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Cypress Traveo S6J32E Series Manual

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The S6J32E, S6J32F, and S6J32G series is an extension of the existing S6J3200 series with 4-MB Flash, 512-KB RAM, and
Ethernet RMII support.
The S6J3200 series microcontrollers are members of the 55-nm Traveo
They are built as a single-chip solution to drive a complete mid-range instrument cluster. They can control up to six gauges and
drive up to two Thin Film Transistor (TFT) displays with WVGA resolution (854 × 480 pixels each). For connecting a HUD, one
display output can be warped on-the-fly for the necessary correction of the windshield bulge. A powerful 2.5D graphics engine
enables the device to be used for many mid-range graphics applications.
Features
Key Features
®
®
240-MHz Arm
Cortex
R5F CPU
4-MB internal high-speed Flash memory, 512-KB RAM
Supports 2.7 V to 5.5 V and 2.7 V to 3.6 V I/O supply voltage
1.2-V core power supply
50-channel 12-bit SAR A/D converter with 1-Msps
conversion rate
Embedded 4-channel CAN FD controller
12-channel Multi-Function Serial (MFS) communication block
Optional Ethernet AVB with MII and RMII interface
Two-channel DDR HSSPI
Optional HyperBus™ interface
Optional Media-LB (MOST25) interface
Six-channel Stepper Motor Controller
Enhanced sound function for high quality
2D/2.5D graphics subsystem with video capture, 2-MB
VRAM, dual-display support, on-the-fly-warping
Cypress Semiconductor Corporation
Document Number: 002-10689 Rev *H
32-bit Microcontroller Traveo
Optional embedded Secure Hardware Extension (SHE) with
AES-128 encryption and decryption
Flash memory retention time up to 20 years
ASIL-B support on ISO26262 specification
256-pin, 216-pin, and 208-pin TEQFP packages
Power domain control
Applications
Automotive cluster application
Classic Cluster Control
Head-Up Display
•
198 Champion Court
S6J32E, S6J32F, S6J32G Series
™
family targeting Cluster and Head-Up Display (HUD).
,
•
San Jose
CA 95134-1709
Datasheet
•
408-943-2600
Revised December 13, 2017

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Summary of Contents for Cypress Traveo S6J32E Series

  • Page 1 Enhanced sound function for high quality  2D/2.5D graphics subsystem with video capture, 2-MB VRAM, dual-display support, on-the-fly-warping • 198 Champion Court • San Jose • 408-943-2600 Cypress Semiconductor Corporation CA 95134-1709 Document Number: 002-10689 Rev *H Revised December 13, 2017...

  • Page 2: Table Of Contents

    S6J32E, S6J32F, S6J32G Series Table of Contents 1. Overview .................................... 4 Microcontroller Support Information ..........................4 Related Documents ............................... 4 2. Function List ..................................5 Function List Table ................................. 5 Optional Function ................................7 2.2.1 Basic Option ................................... 7 2.2.2 ID ....................................9 2.2.3 Restriction ..................................
  • Page 3 S6J32E, S6J32F, S6J32G Series 8.4.7 Multi-Function Serial ..............................87 8.4.8 Timer Input ................................. 109 8.4.9 Trigger Input ................................110 8.4.10 NMI Input ................................... 111 8.4.11 Low-Voltage Detection ............................... 111 8.4.12 High Current Output Slew Rate ..........................117 8.4.13 Display Controller ............................... 118 8.4.14 Video Capture ................................

  • Page 4: Overview

    S6J32E, S6J32F, S6J32G Series Overview Microcontroller Support Information http://www.cypress.com/products/cypress-traveo-family-32-bit-arm-cortex-r5-core-based-microcontrollers Related Documents The following table lists the related documents for the S6J32E, S6J32F, and S6J32G series. Table 1-1 Related Documents Document Type Definition Primary User Document # S6J3200 Series, Specifies the function and its...

  • Page 5: Function List

    S6J32E, S6J32F, S6J32G Series Function List Function List Table The following table shows the functions implemented in the S6J32E, S6J32F, and S6J32G series. Table 2-1 Function List Function Description Remark CPU core Arm Cortex R5F Available (Double precision and Single precision) Available Available Available...
  • Page 6 Vector drawing on 2D engine Available Warping Available Scale/Rotate/Blend Available 2D Driver API Cypress proprietary Notes: − The options are described in Section 2.2. − The specifications related to the electric characteristics in the table only show the typical values. They do not necessarily include the width of characteristics, errors, and so on.

  • Page 7: Optional Function

    Product series Digit Product type Graphic SoC Identifier: Automotive MCU 1) Please contact your Cypress sales representative to receive the customer information CI708-00001 2) controlled by Chip erase enable marker MK_CEER Document Number: 002-10689 Rev *H Page 7 of 166...
  • Page 8 S6J32E, S6J32F, S6J32G Series Table 2-2: Function Digit Table S6J32X Part Number (X = function digit) Function Digit CPU Clock Maximum (MHz) Graphics Clock Maximum (MHz) Display Output Support (ch. no.) 0, 1 0, 1 0, 1 Video Capture Support (units) Graphic Engine Type Hyper Bus Interface (ch.
  • Page 9 S6J32E, S6J32F, S6J32G Series 2.2.2 Each function digit has an ID and revision, which is defined in Figure 2-1. Chip ID can be read from SYSC0_SYSIDR. For SYSC0_SYSIDR (see the Traveo™ Platform hardware manual). Function Memory Pin Count Option Revision Chip ID JTAG ID Digit...

  • Page 10: Restriction

    S6J32E, S6J32F, S6J32G Series Function Memory Pin Count Option Revision Chip ID JTAG ID Digit 0x201035CF 0x2010B5CF 0x201135CF 0x2011B5CF 0x201015CF 0x201095CF 0x201115CF 0x201195CF 0x201055CF 0x2010D5CF 0x201155CF 0x2011D5CF 0x201045CF 0x2010C5CF 0x10150002 0x201145CF 0x2011C5CF 0x201025CF 0x2010A5CF 0x201125CF 0x2011A5CF 0x201005CF 0x201085CF 0x201105CF 0x201185CF 0x201065CF 0x2010E5CF 0x201165CF...
  • Page 11 S6J32E, S6J32F, S6J32G Series Table 2-3: Pin Function Restrictions Function TEQFP-256 TEQFP-216 TEQFP-208 AN1 to AN3, AN5 to AN17, Analog input port AN0 to AN49 AN0 to AN49 AN20 to AN49 (12bit-ADC) (50 ports available) (50 ports available) (46 ports ) P0_00, P0_01, P0_02, P0_03, P0_04, P0_05, P0_00, P0_01, P0_04,...

  • Page 12: Product Description

    S6J32E, S6J32F, S6J32G Series Product Description Overview This section explains the product features of the S6J3200 series. The description of this section should precede the duplicated description on the platform manual. Product Description The following table describes the product features. Table 3-1: Feature Description Feature Description...
  • Page 13 S6J32E, S6J32F, S6J32G Series Feature Description Refer to the platform manual for details. Software Watchdog The product series does not support the Watchdog Counter Monitor Output port. (Related register and internal circuit is implemented.) Refer to the platform manual for details. Standby mode with 5-V single power supply is available.
  • Page 14 S6J32E, S6J32F, S6J32G Series Feature Description Embedded Program Flash can be accessed with 0-wait-cycle if CPU frequency is 80 MHz or less. 0-wait-cycle: 80 MHz or less. 1-wait-cycle: 160 MHz or less. Embedded 2-wait-cycle: more than 160 MHz. Program/Work Flash Memory Erase suspend is supported.
  • Page 15 S6J32E, S6J32F, S6J32G Series Feature Description The input channels of 0 - 4 are reserved for the waveform generator. Mixing different sampling frequency sounds. Mixing internal sounds and external I2S input sounds. Sound Mixer Saturating addition function for keeping sound quality. Cut a specific frequency data by digital filter.
  • Page 16 S6J32E, S6J32F, S6J32G Series Feature Description ch.0: HyperBus as a MCU peripheral ch.1: HyperBus on graphic subsystem ch.2: HyperBus on graphic subsystem The following registers are not supported. − Controller Status Register (HYPERBUSIn_CSR) − Interrupt Enable Register (HYPERBUSIn_IEN) − Interrupt Status Register (HYPERBUSIn_ISR) HyperBus I/F −...

  • Page 17: Ethernet

    S6J32E, S6J32F, S6J32G Series 3.2.1 Ethernet The following functions are not supported. Functions Remark External FIFO Interface Additional Low Latency TX FIFO Interface for DMA configurations MAC Transmit Block - half-duplex - collision - back_pressure MAC Filtering Block - external address match - Wakeup On Lan Energy Efficient Ethernet support LPI Operation in Cadence IP...
  • Page 18 S6J32E, S6J32F, S6J32G Series The following pin functions are required for MII-Interface and RMII-Interface: Pin Function MII-Interface RMII Interface Not used Used RMII_RXERR Not used Used RMII_REFCLK Not used Used RMII_RX0 Not used Used RMII_RX1 Not used Used RMII_TXD0 Not used Used RMII_TXD1 Used...
  • Page 19 S6J32E, S6J32F, S6J32G Series 3.2.2 RAM Guarantee For the following reset factors, RAM Guarantee is not supported Operation after Reset is Released Reset Reset Factor Category Waiting for Mode Security Operation Stabilization Evaluation Evaluation Clock Guarantee Extended internal power Flash 1.2-V external power Fast CR supply low-voltage...

  • Page 20: Package And Pin Assignment

    S6J32E, S6J32F, S6J32G Series Package and Pin Assignment Pin Assignment The characters next to the pin number in the pin assignment drawing specify the I/O circuit type described in Section 5. Figure 4-1: Pin Number and I/O Circuit Type I/O circuit type Pin number ○...

  • Page 21: Teqfp-208

    S6J32E, S6J32F, S6J32G Series 4.1.1 TEQFP-208 Figure 4-2: TEQFP-208 (S6J32EEK, S6J32FEK, S6J32GEK) 0 0 0 0 ○ 156 - DVCC 0 0 0 0 AVSS 155 - DVSS 0 0 0 0 DAC_R 154 S AN49 SIN4 PWM2M5 OCU6_OTD0 ICU6_IN0 PPG6_TOUT0 EINT12 P4_12 MFS0_CS2...

  • Page 22: Teqfp-216

    S6J32E, S6J32F, S6J32G Series 4.1.2 TEQFP-216 Figure 4-3: TEQFP-216 (S6J32EEL, S6J32FEL, S6J32GEL) 0 0 0 0 162 - DVCC ○ 0 0 0 0 AVSS 161 - DVSS 0 0 0 0 DAC_R 160 S AN49 SIN4 PWM2M5 OCU6_OTD0 I CU6_IN0 PPG6_TOUT0 EINT12 P4_12...

  • Page 23: Teqfp-256

    S6J32E, S6J32F, S6J32G Series 4.1.3 TEQFP-256 Figure 4-4: TEQFP-256 (S6J32EEM, S6J32FEM, S6J32GEM) 0 0 0 0 192 - DVCC ○ 0 0 0 0 AVSS 191 - DVSS 0 0 0 0 DAC_R 190 S AN49 SIN4 PWM2M5 OCU6_OTD0 I CU6_IN0 PPG6_TOUT0 EINT12 P4_12...

  • Page 24: Package Dimensions

    S6J32E, S6J32F, S6J32G Series Package Dimensions Note: If the same size is specified for min, nom, and max, then it should be regarded as maximum size. 4.2.1 TEQFP-208 Figure 4-5: LET-208 E1 E E3 E2 EXP OSED PAD BOTTOM VIEW 0.20 C A-B D 0.10 C A-B D TOP VIEW...

  • Page 25: Teqfp-216

    S6J32E, S6J32F, S6J32G Series 4.2.2 TEQFP-216 Figure 4-6 LEQ-216 EXPOSED PAD 0.20 C A-B D 0.10 C A-B D BOTTOM VIEW TOP VIEW DETAIL A GAUGE PLANE SEATING PLANE θ 0.08 C SECTION A-A' 0.07 C A-B DETAIL A SIDE VIEW NOTES : DIM ENSIONS 1.

  • Page 26: Teqfp-256

    S6J32E, S6J32F, S6J32G Series 4.2.3 TEQFP-256 Figure 4-7: LEL-256 002-10752 *A Document Number: 002-10689 Rev *H Page 26 of 166...

  • Page 27: I/O Circuit Type

    S6J32E, S6J32F, S6J32G Series I/O Circuit Type I/O Circuit Type This section explains I/O circuit types. The character denoting the I/O circuit type corresponds to the character for the I/O circuit type in section 4.1. Type Circuit Remark Analog output Analog output (3 V) Audio DAC output Analog output...
  • Page 28 S6J32E, S6J32F, S6J32G Series Type Circuit Remark General-purpose I/O port Pull-up control Output 2 mA, 5 mA, 10 mA, or 20 mA selectable 33 kΩ with pull-up resistor control Digital output 33 kΩ with pull-down resistor control CMOS hysteresis input Digital output TTL input Pull-down control...
  • Page 29 S6J32E, S6J32F, S6J32G Series Type Circuit Remark GPIO port Pull-up control Output 2 mA, 5 mA, 6 mA, or 10 mA selectable 33 kΩ with pull-up resistor control Digital output 33 kΩ with pull-down resistor control CMOS hysteresis input Digital output MediaLB level hysteresis input Pull-down control CMOS-hys input...
  • Page 30 S6J32E, S6J32F, S6J32G Series Type Circuit Remark GPIO port with analog input Pull-up control Output 1 mA, 2 mA, 3 mA(I C), or 5 mA selectable 50 kΩ with pull-up resistor control Digital output 50 kΩ with pull-down resistor control CMOS hysteresis input Digital output Automotive hysteresis input...
  • Page 31 S6J32E, S6J32F, S6J32G Series Type Circuit Remark Mode input CMOS hysteresis input Mode input Control CMOS hysteresis input 50 kΩ with pull-up CMOS-hys input GPIO port with analog input Pull-up control Output 1 mA, 2 mA, 5 mA, or 30 mA selectable 50 kΩ...
  • Page 32 S6J32E, S6J32F, S6J32G Series Type Circuit Remark − General-purpose input port Pull - up control − 50 kΩ with pull-up resistor control − 50 kΩ with pull-down resistor control − CMOS hysteresis input Automotive hysteresis input Pull - down control CMOS - hys input PSS control Automotive input...
  • Page 33 S6J32E, S6J32F, S6J32G Series Type Circuit Remark GPIO port Pull-up control Output 1 mA, 2 mA, or 5 mA selectable 50 kΩ with pull-up resistor control Digital output 50 kΩ with pull-down resistor control Digital output CMOS hysteresis input Automotive hysteresis input Pull-down control TTL input CMOS-hys input...

  • Page 34: Port Description

    S6J32E, S6J32F, S6J32G Series Port Description Port Description List The following table shows the port functions of descriptions that are supported. The port function, which is not described in the table, is not supported for the product. Package Pin Number Port Name Description Remark...
  • Page 35 S6J32E, S6J32F, S6J32G Series Package Pin Number Port Name Description Remark TEQFP-208 TEQFP-216 TEQFP-256 Non-maskable interrupt NMIX input pin RSTX External reset input pin External power supply PSC_1 control pin MODE Mode pin External capacity connection output pin JTAG_NTRST JTAG test reset input pin JTAG_TDO JTAG test data output pin JTAG_TDI...
  • Page 36 S6J32E, S6J32F, S6J32G Series Package Pin Number Port Name Description Remark TEQFP-208 TEQFP-216 TEQFP-256 AN22 ADC Analog 22 input pin AN23 ADC Analog 23 input pin AN24 ADC Analog 24 input pin AN25 ADC Analog 25 input pin AN26 ADC Analog 26 input pin AN27 ADC Analog 27 input pin AN28...
  • Page 37 S6J32E, S6J32F, S6J32G Series Package Pin Number Port Name Description Remark TEQFP-208 TEQFP-216 TEQFP-256 External interrupt input 60, 100, 144, 181, 45, 62, 104, 124, 49, 77, 124, 146, EINT4 150, 189, 211 178, 224, 250 External interrupt input 44, 72, 101, 127, 46, 74, 105, 133, 50, 89, 125, 155, EINT5...
  • Page 38 S6J32E, S6J32F, S6J32G Series Package Pin Number Port Name Description Remark TEQFP-208 TEQFP-216 TEQFP-256 Multi-function serial ch.1 SCK1 83, 94 85, 98 100, 115 clock I/O pin Multi-function serial ch.2 SCK2 clock I/O pin Multi-function serial ch.3 SCK3 clock I/O pin Multi-function serial ch.4 SCK4 clock I/O pin...
  • Page 39 S6J32E, S6J32F, S6J32G Series Package Pin Number Port Name Description Remark TEQFP-208 TEQFP-216 TEQFP-256 Multi-function serial ch.8 SOT8 99, 179 103, 187 122, 221 serial data output pin Multi-function serial ch.9 SOT9 160, 187 166, 195 196, 231 serial data output pin Multi-function serial ch.10 SOT10 163, 191...
  • Page 40 S6J32E, S6J32F, S6J32G Series Package Pin Number Port Name Description Remark TEQFP-208 TEQFP-216 TEQFP-256 55, 76, 94, 128, 57, 78, 98, 134, PPG7_TOUT0 Base timer 14 output pin 67, 93, 115, 157, 231 56, 79, 95, 129, 58, 81, 99, 135, PPG7_TOUT2 Base timer 15 output pin 70, 96, 116, 158, 232...
  • Page 41 S6J32E, S6J32F, S6J32G Series Package Pin Number Port Name Description Remark TEQFP-208 TEQFP-216 TEQFP-256 Output compare 2 ch.0 144, 163, 203, 45, 150, 171, 211, 49, 178, 203, 250, OCU2_OTD0 output pin Output compare 2 ch.1 OCU2_OTD1 44, 147, 164, 174 46, 153, 172, 182 50, 181, 204, 215 output pin...
  • Page 42 S6J32E, S6J32F, S6J32G Series Package Pin Number Port Name Description Remark TEQFP-208 TEQFP-216 TEQFP-256 Input Capture 4 ch.0 input 33, 47, 150, 167, 33, 49, 92, 156, 33, 55, 107, 185, ICU4_IN0 175, 185 208, 219 Input Capture 4 ch.1 input 48, 84, 90, 151, 50, 86, 93, 157, 58, 101, 108, 187,...
  • Page 43 S6J32E, S6J32F, S6J32G Series Package Pin Number Port Name Description Remark TEQFP-208 TEQFP-216 TEQFP-256 PCM PWM ch.0 output BN0(BL0) 130, 177 136, 185 159, 219 PCM PWM ch.1 output BN1(BL1) 134, 181 140, 189 165, 224 PCM PWM ch.0 output BP0(BH0) 129, 176 135, 184...
  • Page 44 S6J32E, S6J32F, S6J32G Series Package Pin Number Port Name Description Remark TEQFP-208 TEQFP-216 TEQFP-256 Reload timer ch.35 event TIN35 61, 123 75, 145 input pin Reload timer ch.48 event TIN48 input pin Reload timer ch.49 event TIN49 input pin Reload timer ch.0 output TOT0 34, 96 34, 100...
  • Page 45 S6J32E, S6J32F, S6J32G Series Package Pin Number Port Name Description Remark TEQFP-208 TEQFP-216 TEQFP-256 Pin 34 is not RXDV Ethernet pin 34, 57 34, 59 34, 71 supported on revision M RXCLK Ethernet pin TXER Ethernet pin TXEN Ethernet pin TXCLK Ethernet pin Ethernet pin...
  • Page 46 S6J32E, S6J32F, S6J32G Series Package Pin Number Port Name Description Remark TEQFP-208 TEQFP-216 TEQFP-256 Graphic HS-SPI0 data 1 G_SDATA0_1 Graphic HS-SPI0 data 2 G_SDATA0_2 Graphic HS-SPI0 data 3 G_SDATA0_3 Graphic HS-SPI1 data 0 G_SDATA1_0 Graphic HS-SPI1 data 1 G_SDATA1_1 Graphic HS-SPI1 data 2 G_SDATA1_2 Graphic HS-SPI1 data 3 G_SDATA1_3...
  • Page 47 S6J32E, S6J32F, S6J32G Series Package Pin Number Port Name Description Remark TEQFP-208 TEQFP-216 TEQFP-256 M_SDATA0_3 MCU HS-SPI0 data 3 pin M_SDATA1_0 MCU HS-SPI1 data 0 pin M_SDATA1_1 MCU HS-SPI1 data 1 pin M_SDATA1_2 MCU HS-SPI1 data 2 pin M_SDATA1_3 MCU HS-SPI1 data 3 pin MCU HS-SPI0 select M_SSEL0 output pin...
  • Page 48 S6J32E, S6J32F, S6J32G Series Package Pin Number Port Name Description Remark TEQFP-208 TEQFP-216 TEQFP-256 Display 0 Control output DSP0_CTRL9 Display 0 Control output DSP0_CTRL10 Display 0 Control output DSP0_CTRL11 DSP0_DATA0_0 Display 0 Data output pin DSP0_DATA0_1 Display 0 Data output pin DSP0_DATA0_2 Display 0 Data output pin DSP0_DATA0_3...
  • Page 49 S6J32E, S6J32F, S6J32G Series Package Pin Number Port Name Description Remark TEQFP-208 TEQFP-216 TEQFP-256 Display 0 RSDS Data DSP0_DATA_D6+ output pin Display 0 RSDS Data DSP0_DATA_D7- output pin Display 0 RSDS Data DSP0_DATA_D7+ output pin Display 0 RSDS Data DSP0_DATA_D8- output pin Display 0 RSDS Data DSP0_DATA_D8+...
  • Page 50 S6J32E, S6J32F, S6J32G Series Package Pin Number Port Name Description Remark TEQFP-208 TEQFP-216 TEQFP-256 Video Capture 0 Data CAP0_DATA1 input pin Video Capture 0 Data CAP0_DATA2 input pin Video Capture 0 Data CAP0_DATA3 input pin Video Capture 0 Data CAP0_DATA4 input pin Video Capture 0 Data CAP0_DATA5...
  • Page 51 S6J32E, S6J32F, S6J32G Series Package Pin Number Port Name Description Remark TEQFP-208 TEQFP-216 TEQFP-256 Video Capture 0 Data CAP0_DATA35 input pin Indicator PWM output pin INDICATOR0_0 0 (It can also be obtained from INDICATOR0_1) Indicator PWM output pin INDICATOR0_1 1 (It can also be obtained from INDICATOR0_0) P0_00 GPIO port...
  • Page 52 S6J32E, S6J32F, S6J32G Series Package Pin Number Port Name Description Remark TEQFP-208 TEQFP-216 TEQFP-256 P3_01 GPIO port P3_02 GPIO port P3_03 GPIO port P3_04 GPIO port P3_05 GPIO port P3_06 GPIO port P3_07 GPIO port P3_08 GPIO port P3_09 GPIO port P3_10 GPIO port P3_11...
  • Page 53 S6J32E, S6J32F, S6J32G Series Package Pin Number Port Name Description Remark TEQFP-208 TEQFP-216 TEQFP-256 P5_05 GPIO port P5_06 GPIO port P5_07 GPIO port P5_08 GPIO port P5_09 GPIO port P5_10 GPIO port P5_11 GPIO port P5_12 GPIO port P5_13 GPIO port P5_14 GPIO port P5_15...

  • Page 54: Remark

    All semiconductor devices have inherently a certain rate of failure. The possibility of failure is greatly affected by the conditions in which they are used (circuit conditions, environmental conditions, and so on.). This page describes precautions that must be observed to minimize the chance of failure and to obtain higher reliability from your Cypress semiconductor devices. 7.1.1 Precautions for Product Design This section describes precautions when designing electronic equipment using semiconductor devices.

  • Page 55: Precautions For Package Mounting

    Use appropriate mounting techniques. Cypress recommends the solder reflow method and has established a ranking of mounting conditions for each product. Users are advised to mount packages in accordance with Cypress ranking of recommended conditions.

  • Page 56: Precautions For Use Environment

    CAUTION: Plastic molded devices are flammable, and therefore should not be used near combustible substances. If devices begin to smoke or burn, there is danger of the release of toxic gases. Customers considering the use of Cypress products in other special environmental conditions should consult with sales representatives.

  • Page 57: Handling Devices

    S6J32E, S6J32F, S6J32G Series Handling Devices For Latch-Up Prevention The latch-up phenomenon may occur on a CMOS IC in the following cases: the voltage applied to an input or output pin is higher than VCC or lower than VSS; or the voltage applied between a VCC pin and a VSS pin exceeds the rating. A latch-up causes a rapid increase in the power supply current, possibly resulting in thermal damage to an element.
  • Page 58 S6J32E, S6J32F, S6J32G Series Mode Pin (MD) Use mode pin MD by directly connecting it to a VCC or VSS pin. To prevent noise from causing the device to accidentally enter test mode, reduce the pattern length between each mode pin and a VCC or VSS pin on the printed circuit board, and connect them with low impedance.

  • Page 59: Electric Characteristics

    S6J32E, S6J32F, S6J32G Series Electrical Characteristics Absolute Maximum Rating Rating Parameter Symbol Unit Remarks -0.3 +6.0 ≤ V -0.3 +6.0 CC53 CC53 ≤ V -0.3 +4.0 ≤ V -0.3 +6.0 *1, *2 Power supply voltage ≤ V CC12 CC53 ≤ V CC12 -0.3 +1.8...
  • Page 60 S6J32E, S6J32F, S6J32G Series Rating Parameter Symbol Unit Remarks *6, *7, *8 When setting is 1 mA OLAV1 *6, *7, *8, *9 When setting is 2 mA OLAV2 *6, *7, *8, *9 When setting is 5 mA OLAV3 When setting is 10 mA "L"-level average output OLAV4 When setting is 20 mA...
  • Page 61 S6J32E, S6J32F, S6J32G Series These parameters are based on the condition that VSS = AVSS = DVSS = 0.0 V. Take care that DVCC and AVCC5 do not exceed VCC5 at, for example, the power-on time. It is strongly recommended to set VCC5, DVCC, and AVCC5 to the same voltage during operation (see *13). The maximum output current is defined as the value of the peak current flowing through any one of the corresponding pins.
  • Page 62 S6J32E, S6J32F, S6J32G Series Example of a recommended circuit S6J3200 series WARNING: − Semiconductor devices may be permanently damaged by application of stress (including, without limitation, voltage, current or temperature) in excess of absolute maximum ratings. Do not exceed any of these ratings. Document Number: 002-10689 Rev *H Page 62 of 166...

  • Page 63: Operation Assurance Condition

    S6J32E, S6J32F, S6J32G Series Operation Assurance Condition Symbol Value Parameter Unit Remarks Corresponding Power Supply Ground CC53 Specified electric characteristics are assured in this range. CC12 _DAC _DAC Supply voltage _LVDS_Tx _LVDS_Tx _LVDS_PLL _LVDS_PLL CC53 Specified electric characteristics are NOT assured in this range.
  • Page 64 S6J32E, S6J32F, S6J32G Series WARNING: The recommended operating conditions are required to ensure the normal operation of the semiconductor device. All the device's electrical characteristics are warranted when the device is operated under these conditions. Any use of semiconductor devices will be under their recommended operating condition. Operation under any conditions other than these conditions may adversely affect reliability of device and could result in device failure.
  • Page 65 S6J32E, S6J32F, S6J32G Series Figure 8-2: Land Pattern and Thermal via LEQ-216 0.25 mm ≤ a ≤ 0.30 mm Document Number: 002-10689 Rev *H Page 65 of 166...
  • Page 66 S6J32E, S6J32F, S6J32G Series Figure 8-3: Land Pattern and Thermal via LET-208 0.25 mm ≤ a ≤ 0.30 mm Document Number: 002-10689 Rev *H Page 66 of 166...
  • Page 67 S6J32E, S6J32F, S6J32G Series Figure 8-4: Optional Land Pattern 0.25 mm ≤ a ≤ 0.30 mm Document Number: 002-10689 Rev *H Page 67 of 166...

  • Page 68: Dc Characteristics

    S6J32E, S6J32F, S6J32G Series DC Characteristics 8.3.1 Port Function Characteristics (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks CMOS hysteresis 0.7×V +0.3 CC53 CC53 input level is selected P4_25 to 31, Automotive input level P5_00 to 20, 0.8×V +0.3 CC53...
  • Page 69 S6J32E, S6J32F, S6J32G Series Value Parameter Symbol Pin Name Conditions Unit Remarks CMOS hysteresis -0.3 0.3×V CC53 input level is selected P4_25 to 31, Automotive input level P5_00 to 20, -0.3 0.5×V CC53 is selected P6_20 to 26 TTL input level is -0.3 selected P2_16, 17, 19, 22,...
  • Page 70 S6J32E, S6J32F, S6J32G Series (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks = 3.0 V CC53 -0.5 CC53 CC53 = -1.0 mA P4_25 to 31, = 3.0 V CC53 P5_00 to 20, -0.5 CC53 CC53 = -2.0 mA P6_20 to 26 = 3.0 V...
  • Page 71 S6J32E, S6J32F, S6J32G Series (Condition: See 8.2. Operation Assurance ) Value Parameter Symbol Pin Name Conditions Unit Remarks =3.0 V CC53 =1.0 mA P4_25 to 31, =3.0 V CC53 P5_00 to 20, =2.0 mA P6_20 to 26 =3.0 V CC53 =5.0 mA =4.5 V =1.0 mA...
  • Page 72 S6J32E, S6J32F, S6J32G Series (Condition: See 8.2. Operation Assurance ) Value Parameter Symbol Pin Name Conditions Unit Remarks P2_16, 17, 19, 22, 24 to 31, CC53 P3_00 to 31, 5-V pins P4_00 to 12, P4_25 to 31, µA 5-V/3-V = 5.5 V P5_00 to 20, pins Input leakage...
  • Page 73 S6J32E, S6J32F, S6J32G Series (Condition: See 8.2. Operation Assurance ) Value Parameter Symbol Pin Name Conditions Unit Remarks High current output = 4.5 V drive capacity = -30.0 mA Delta-V OH23 Phase-to-phase Maximum deviation of P3_21 to 31, deviation1 OH23 P4_00 to 12, High current output = 4.5 V...

  • Page 74: Power Supply Current

    S6J32E, S6J32F, S6J32G Series 8.3.2 Power Supply Current 8.3.2.1 Run Mode (Condition: See 8.2. Operation Assurance Value Symbol Pin Name Conditions Unit Remark Normal Operation VCC5 Adder for Work Flash Programming or Erasing CPU: 240 MHz, HPM: 120 MHz, GDC: 200 MHz (Worst case use case) 1250 CPU: 120 MHz, HPM: 60 MHz, GDC: 0 MHz...
  • Page 75 S6J32E, S6J32F, S6J32G Series 8.3.2.2 PSS Timer Mode Shutdown (PD6=OFF) (Condition: See 8.2. Operation Assurance Value Symbol Conditions Unit Remark Name =10 pF 4-MHz Crystal for Main Oscillator µA MCGAIN = 0b00 PD1=ON, PD4_0=ON, PD4_1=ON (4 MHz) =10 pF 4-MHz Crystal for Main Oscillator µA MCGAIN = 0b00 PD1=ON, PD4_0 or PD4_1=ON...
  • Page 76 S6J32E, S6J32F, S6J32G Series 8.3.2.4 Internal CR oscillator current consumption (Condition: See 8.2. Operation Assurance Value Symbol Conditions Unit Remark Name Slow CR oscillator (100 kHz) – operation µA mode Fast CR oscillator (4 MHz) – operation VCC5 µA Before trimming mode Fast CR oscillator (4 MHz) –...

  • Page 77: Ac Characteristics

    S6J32E, S6J32F, S6J32G Series AC Characteristics 8.4.1 Source Clock Timing (Condition: See 8.2. Operation Assurance Value Parameter Symbol Conditions Unit Remarks Name Source oscillation X0, X1 clock frequency Source oscillation tCYL X0, X1 62.5 277.8 clock cycle time CAN PLL jitter (when locked) Internal Slow CR FCRS...

  • Page 78: Sub Clock Timing

    S6J32E, S6J32F, S6J32G Series 8.4.2 Sub Clock Timing (Condition: See 8.2. Operation Assurance Value Parameter Symbol Conditions Unit Remarks Name Source oscillation X0A, X1A 32.768 clock frequency Source oscillation X0A, X1A 30.52 µs LCYL clock cycle time − X0A and X1A clock timing LCYL 8.4.3 Internal Clock Timing...
  • Page 79 S6J32E, S6J32F, S6J32G Series Max Value Combination Symbol Unit Remarks Max *1 Max *2 Max *3 CLK_HPM2 CLK_DMA CLK_MEMC Unused CLK_EXTBUS CLK_SYSC1 Unused CLK_HAPP0A0 Unused CLK_HAPP0A1 CLK_HAPP1B0 Unused CLK_HAPP1B1 CLK_LLPBM CLK_LLPBM2 CLK_LCP CLK_LCP0 66.7 CLK_LCP0A Unused CLK_LCP1 66.7 CLK_LCP1A Unused CLK_LAPP0 Unused CLK_LAPP0A...
  • Page 80 S6J32E, S6J32F, S6J32G Series Notes: − *1: Maximum clock frequencies when CPU clock = 240 MHz. − For SSCG, down spread and center spread modes are supported with following conditions: ➢ For down spread mode, clock frequency setting can be up to max SSCG frequency defined in above table. ➢...
  • Page 81 S6J32E, S6J32F, S6J32G Series − Relationship between the oscillation clock frequency and internal clock frequency (example) Internal Operation Clock Frequency PLL Clock Main Multiplied Multiplied Multiplied Multiplied Multiplied Multiplied Clock by 1 by 2 by 3 by 4 by 40 by 60 Oscillation clock...

  • Page 82: Reference Voltages For Ac Characteristics Of I/O Cells

    S6J32E, S6J32F, S6J32G Series 8.4.4 Reference Voltages for AC Characteristics of I/O Cells AC characteristics are specified by the following measurement reference voltage values. − − Input signal waveform Output signal waveform Hysteresis input pin (Automotive) Output pin 0.8V 2.4V 0.5V 0.8V Hysteresis input pin (CMOS Schmitt)

  • Page 83: Reset Input

    S6J32E, S6J32F, S6J32G Series 8.4.5 Reset 8.4.5.1 Reset Input (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks Reset µs input time RSTX RSTL Reset input µs pulse filter time RSTL RSTX 0.2V 0.2V 8.4.5.2 Power Supply Voltage Stability Conditions (Condition: See 8.2.

  • Page 84: Power-On Conditions

    S6J32E, S6J32F, S6J32G Series RSTX 0.2 VCC5 >=2.7V VCC5 1.1V VCC12 FV12 8.4.6 Power-On Conditions 8.4.6.1 Power-On Conditions (Condition: See 8.2. Operation Assurance Value Parameter Symbol Conditions Unit Remarks Name Level detection VCC5 2.15 2.35 2.55 voltage Reset release VCC5 2.25 2.45 2.65...
  • Page 85 S6J32E, S6J32F, S6J32G Series *4 If power ramp rate is below this value power on reset is guaranteed. *5: When VCC5 is within the 2.65 V to 4.5 V range, and VCC5 fluctuation is below 50 mV/µs, the power-on reset is suppressed. Between 4.5 V to 5.5 V, the power-on reset does not occur with any VCC5 fluctuation.
  • Page 86 S6J32E, S6J32F, S6J32G Series 8.4.6.2 VCC12 Stabilization Time during Power-On / PSS to RUN Transition (Condition: See 8.2. Operation Assurance Value Parameter Symbol Conditions Unit Remarks Name VCC12 stabilization tV12STPO VCC12 14.2 time during power-on 0000 0001 0010 0011 0100 0101 0110 VCC12 stabilization...
  • Page 87 S6J32E, S6J32F, S6J32G Series 8.4.7 Multi-Function Serial 8.4.7.1 Asynchronous Serial Interface (UART) Timing (SMR:MD2-0=0b000, 0b001) (1) External Clock Selected (BGR:EXT=1) (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks SCK0 to SCK4, CLK_LCPnA Serial clock SCK8 to SLSH SCK12 "L"...
  • Page 88 S6J32E, S6J32F, S6J32G Series 8.4.7.2 CSIO Timing (SMR:MD2-0=0b010) (1) Normal Synchronous Transfer (SCR:SPI=0) and Mark Level "H" of Serial Clock Output (SMR:SCINV=0) (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks SCK0, SCK1, SCK3, SCK4, CLK_LCPnA Serial clock SCK8 to SCK12 SCYC...
  • Page 89 S6J32E, S6J32F, S6J32G Series Value Parameter Symbol Pin Name Conditions Unit Remarks SCK0, SCK1, SCK3, SCK4, CLK_LCPnA Serial clock SCK8 to SCK12 SHSL "H" pulse width SCK2 CLK_LCP0A SCK16, SCK17 CLK_COMP SCK0, SCK1, SCK3, SCK4, CLK_LCPnA Serial clock SCK8 to SCK12 SLSH "L"...
  • Page 90 S6J32E, S6J32F, S6J32G Series SCYC SLOVI IVSHI SHIXI Master mode SLSH SHSL SLOVE IVSHE SHIXE Slave mode Document Number: 002-10689 Rev *H Page 90 of 166...
  • Page 91 S6J32E, S6J32F, S6J32G Series (2) Normal Synchronous Transfer (SCR:SPI=0) and Mark Level "L" of Serial Clock Output (SMR:SCINV=1) (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks SCK0, SCK1, SCK3, SCK4, CLK_LCPnA Serial clock SCK8 to SCK12 SCYC cycle time SCK2...
  • Page 92 S6J32E, S6J32F, S6J32G Series Value Parameter Symbol Pin Name Conditions Unit Remarks SCK0, SCK1, SCK3, SCK4, CLK_LCPnA Serial clock SCK8 to SCK12 SHSL "H" pulse width SCK2 CLK_LCP0A SCK16, SCK17 CLK_COMP SCK0, SCK1, SCK3, SCK4, CLK_LCPnA Serial clock SCK8 to SCK12 SLSH "L"...
  • Page 93 S6J32E, S6J32F, S6J32G Series SCYC SHOVI IVSLI SLIXI Master mode SHSL SLSH SHOVE IVSLE SLIXE Slave mode Document Number: 002-10689 Rev *H Page 93 of 166...
  • Page 94 S6J32E, S6J32F, S6J32G Series (3) SPI Supported (SCR:SPI=1), and Mark Level "H" of Serial Clock Output (SMR:SCINV=0) (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks SCK0, SCK1, SCK3, SCK4, CLK_LCPnA Serial clock SCK8 to SCK12 SCYC cycle time SCK2...
  • Page 95 S6J32E, S6J32F, S6J32G Series Value Parameter Symbol Pin Name Conditions Unit Remarks SCK0, SCK1, SCK3, SCK4, CLK_LCPnA Serial clock SCK8 to SCK12 SHSL "H" pulse width SCK2 CLK_LCP0A SCK16, SCK17 CLK_COMP SCK0, SCK1, SCK3, SCK4, CLK_LCPnA Serial clock SCK8 to SCK12 SLSH "L"...
  • Page 96 S6J32E, S6J32F, S6J32G Series SCYC SOVLI SHOVI IVSLI SLIXI Master mode SHSL SLSH SHOVE IVSLE SLIXE * Changes when writing to the TDR register Slave mode Document Number: 002-10689 Rev *H Page 96 of 166...
  • Page 97 S6J32E, S6J32F, S6J32G Series (4) SPI Supported (SCR:SPI=1), and Mark Level "L" of Serial Clock Output (SMR:SCINV=1) (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks SCK0, SCK1, SCK3, SCK4, CLK_LCPnA Serial clock SCK8 to SCK12 SCYC cycle time SCK2...
  • Page 98 S6J32E, S6J32F, S6J32G Series Value Parameter Symbol Pin Name Conditions Unit Remarks SCK0, SCK1, SCK3, SCK4, CLK_LCPnA Serial clock SCK8 to SCK12 SHSL "H" pulse width SCK2 CLK_LCP0A SCK16, SCK17 CLK_COMP SCK0, SCK1, SCK3, SCK4, CLK_LCPnA Serial clock SCK8 to SCK12 SLSH "L"...
  • Page 99 S6J32E, S6J32F, S6J32G Series SCYC SLOVI SOVHI IVSHI SHIXI Master mode SLSH SHSL SLOV SHIXE IVSHE * Changes when writing to the TDR register Slave mode Document Number: 002-10689 Rev *H Page 99 of 166...
  • Page 100 S6J32E, S6J32F, S6J32G Series (5) Mark Level "H" of Serial Clock Output (SMR:SCINV=0) and Mark Level "H" of Serial Chip Select (SCSCR:CSLVL=1) (Condition: See 8.2. Operation Assurance Value Parameter Symbol Conditions Unit Remarks SCS↓→SCK↓setup time Master mode CSSI (CL = 20 pF SCK↑→SCS↑hold time CSHI =-5 mA,...
  • Page 101 S6J32E, S6J32F, S6J32G Series (6) Mark Level "L" of Serial Clock Output (SMR:SCINV=1) and Mark Level "H" of Serial Chip Select (SCSCR:CSLVL=1) (Condition: See 8.2. Operation Assurance Value Parameter Symbol Conditions Unit Remarks SCS↓→SCK↑setup time Master mode CSSI (CL = 20 pF SCK↓→SCS↑hold time CSHI =-5 mA,...
  • Page 102 S6J32E, S6J32F, S6J32G Series Document Number: 002-10689 Rev *H Page 102 of 166...
  • Page 103 S6J32E, S6J32F, S6J32G Series (7) Mark Level "H" of Serial Clock Output (SMR:SCINV=0) and Mark Level "L" of Serial Chip Select (SCSCR:CSLVL=0) (Condition: See 8.2. Operation Assurance Value Parameter Symbol Conditions Unit Remarks SCS↑→SCK↓setup time Master mode CSSI (CL = 20 pF SCK↑→SCS↓hold time CSHI = -5 mA,...
  • Page 104 S6J32E, S6J32F, S6J32G Series (8) Mark Level "L" of Serial Clock Output (SMR:SCINV=1) and Mark Level "L" of Serial Chip Select (SCSCR:CSLVL=0) (Condition: See 8.2. Operation Assurance Value Parameter Symbol Conditions Unit Remarks SCS↑→SCK↑setup time Master mode CSSI (CL = 20 pF SCK↓→SCS↓hold time CSHI = -5 mA,...
  • Page 105 S6J32E, S6J32F, S6J32G Series Document Number: 002-10689 Rev *H Page 105 of 166...
  • Page 106 S6J32E, S6J32F, S6J32G Series 8.4.7.3 LIN Interface (v2.1) (LIN Communication Control Interface (v2.1)) Timing (SMR:MD2-0=0b011) (1) External Clock Selected (BGR:EXT=1) (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks SCK0 to SCK4, CLK_LCPnA SCK8 to Serial clock SCK12 SLSH "L"...
  • Page 107 S6J32E, S6J32F, S6J32G Series 8.4.7.4 C Timing (SMR:MD2-0=0b100) (Condition: See 8.2. Operation Assurance Standard Fast Mode Mode Parameter Symbol Pin Name Conditions Unit Remarks SCL4, 10, 12, SCL clock frequency 16, and 17 SDA4, 10, 12, Repeat "start" 16, and 17 µs condition hold time HDSTA...
  • Page 108 S6J32E, S6J32F, S6J32G Series SUSTA SUDAT HDSTA HDDAT HIGH HDSTA SUSTO Document Number: 002-10689 Rev *H Page 108 of 166...
  • Page 109 S6J32E, S6J32F, S6J32G Series 8.4.8 Timer Input (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks ≥ 100 ns PPG0_TIN1 to CLK_LCPnA CLK_LCPnA PPG11_TIN1 < 100 ns CLK_LCPnA ≥ 100 ns ICU0_IN0 to CLK_LCPnA CLK_LCPnA ICU11_IN0, ICU0_IN1 to <...
  • Page 110 S6J32E, S6J32F, S6J32G Series 8.4.9 Trigger Input (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks TRGH EINT0 to EINT15 Input pulse width TRGL − Trigger input timing TRGH TRGL EINTx Document Number: 002-10689 Rev *H Page 110 of 166...
  • Page 111 S6J32E, S6J32F, S6J32G Series 8.4.10 NMI Input (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks NMIX Input pulse width NMIL − NMIX input timing NMIL NMIX 8.4.11 Low-Voltage Detection 8.4.11.1 LVDL0 (Condition: See 8.2. Operation Assurance Value Parameter Pin Name...
  • Page 112 S6J32E, S6J32F, S6J32G Series 8.4.11.3 LVDL1 (Condition: See 8.2. Operation Assurance Value Guaranteed Parameter Pin Name Conditions Unit Remarks Operation Range Detection 0.92 0.97 1.02 Voltage LVDL1V = 10 Release (Default) 0.945 1.045 1.145 Voltage Detection 1.02 1.07 1.12 Voltage LVDL1V = 11 Release 1.095...
  • Page 113 S6J32E, S6J32F, S6J32G Series 8.4.11.4 LVDH1 (Condition: See 8.2. Operation Assurance Value Guaranteed Parameter Conditions Unit Remarks Name Operation Range Supply Voltage Range Detection 2.20 2.35 2.50 Voltage LVDH1V = 0000 Release 2.30 2.45 2.60 Voltage Detection 2.60 2.75 2.90 Voltage LVDH1V = 0001 Release...
  • Page 114 S6J32E, S6J32F, S6J32G Series − Following power supply voltage stability conditions need to be ensured (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks VCC5 stability time after LVDH1 VCC5 ≥ 2.7 V VCC5 µs low voltage detection VCC12 stability time after LVDH1...
  • Page 115 S6J32E, S6J32F, S6J32G Series Value Guaranteed Parameter Pin Name Conditions Unit Remarks operation range Release 0.795 0.845 0.895 Voltage Detection 0.82 0.87 0.92 Voltage LVDL2V = 01 Release 0.895 0.945 0.995 Voltage Detection 0.92 0.97 1.02 Voltage LVDL2V = 10 Release 0.995 1.045...
  • Page 116 S6J32E, S6J32F, S6J32G Series 8.4.11.6 LVDH2 (Condition: See 8.2. Operation Assurance Value Guaranteed Parameter Pin Name Conditions Unit Remarks operation range Supply Voltage Range Detection 2.35 Voltage LVDH2V = 0000 Release (Default) 2.45 Voltage Detection 2.75 Voltage LVDH2V = 0001 Release 2.85 Voltage...
  • Page 117 S6J32E, S6J32F, S6J32G Series 8.4.12 High Current Output Slew Rate (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks Output rise / P3_21 to 31, Load capacitance P4_00 to 12 fall time 85 pF Document Number: 002-10689 Rev *H Page 117 of 166...
  • Page 118 S6J32E, S6J32F, S6J32G Series 8.4.13 Display Controller 8.4.13.1 Display Controller0 Timing (TTL Mode) (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks 15.625 DSP0_CLK Clock Cycle DC0CYC Data/Control output (CL = 20 pF, – 8 DC0S DCOCYC to DSP0_CLK time = -10 mA,...
  • Page 119 S6J32E, S6J32F, S6J32G Series 8.4.13.2 Display Controller0 Timing (RSDS) (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks DSP0_CLK+ Clock Cycle 15.625 RSCYC DSP0_CLK- /2 – Data output to RSCYC DSP0_CLK time DSP0_DATA_D11~0+ DSP0_DATA_D11~0- DSP0_CLK to Data (CL = 20 pF, -0.1 valid time...
  • Page 120 S6J32E, S6J32F, S6J32G Series 8.4.13.3 Display Controller1 Timing (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks DSP1_CLK 20.0 Clock Cycle DC1CYC Data/Control output – 4.6 (CL = 20 pF, DC1S DC1CYC to DSP1_CLK time DSP1_DATA0_11-0 IOL=-5 mA, DSP1_DATA1_11-0 DSP1_CLK to...
  • Page 121 S6J32E, S6J32F, S6J32G Series 8.4.14 Video Capture 8.4.14.1 Video Capture Timing (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks CAP0_CLK 12.5 Clock Cycle CAP0CYC Capture data setup CAP0_DATA35~0 CAP0SU time Capture data hold CAP0_DATA35~0 CAP0HD time CAP0CYC CAP0_CLK...
  • Page 122 S6J32E, S6J32F, S6J32G Series 8.4.15 FPD-Link (LVDS) (Condition: See 8.2. Operation Assurance Value Parameter Symbol Conditions Unit Remarks Output clock frequency One of three is Differential output voltage selectable = 100 Ω delta V Variation of V = 5 pF 1.075 1.200 1.325...
  • Page 123 S6J32E, S6J32F, S6J32G Series Value Parameter Symbol Conditions Unit Remarks Output pulse position for 1 / 7 x T 1 / 7 x T 1 / 7 x T -0.45 +0.45 bit 1 Output pulse position for 2 / 7 x T 2 / 7 x T 2 / 7 x T -0.45...
  • Page 124 S6J32E, S6J32F, S6J32G Series Figure 8-5: LVDS AC Timing Chart TxCLK / (T TxDOUT3 TxDOUT2 TxDOUT1 TxDOUT0 Document Number: 002-10689 Rev *H Page 124 of 166...
  • Page 125 S6J32E, S6J32F, S6J32G Series Figure 8-6: LVDS AC Timing Chart Single End Common voltage for each data bit Tx-M Voltage [V] Delta V Tx-P .max – V Delta V .min Tx-M Voltage [V] Tx-P Document Number: 002-10689 Rev *H Page 125 of 166...
  • Page 126 S6J32E, S6J32F, S6J32G Series 8.4.16 DDR-HSSPI The DDR-HSSPI AC characteristics are specified with the specific reference voltage of V = 0.5 Vcc3 as mentioned in Section 8.4.3, regardless of automotive input-level configuration, CMOS Schmitt, and TTL. 8.4.16.1 DDR-HSSPI Interface Timing (SDR Mode) (Condition: See 8.2.
  • Page 127 S6J32E, S6J32F, S6J32G Series G_SCLK 0 spcnt Delayed sample clock isdata ihdata G_SDATA 0 _ 0 - 3 , valid G_SDATA 1 _ 0 - 3 (input timing) oddata ohdata G_SDATA 0 _ 0 - 3 , valid G_SDATA 1 _ 0 - 3 (output timing) odsel ohsel...
  • Page 128 S6J32E, S6J32F, S6J32G Series 8.4.16.2 DDR-HSSPI Interface Timing (DDR Mode) (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks 12.5 During Quad G_SCLK0 Page mode HSSPI clock cycle M_SCLK0 or Dual quad mode G_SDATA0_0-3 GSDATA -> G_SCLK↑↓ G_SDATA1_0-3 isdata M_SDATA0_0-3...
  • Page 129 S6J32E, S6J32F, S6J32G Series Document Number: 002-10689 Rev *H Page 129 of 166...
  • Page 130 S6J32E, S6J32F, S6J32G Series 8.4.17 HyperBus The HyperBus AC characteristics are specified with the specific reference voltage of V = 0.5 Vcc3 as mentioned in Section 8.4.3, regardless of automotive input-level configuration, CMOS Schmitt, and TTL. 8.4.17.1 HyperBus Write Timing (HyperFlash) (Condition: See 8.2.
  • Page 131 S6J32E, S6J32F, S6J32G Series 8.4.17.2 Hyper Bus Write Timing (HyperRAM) (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks G_CK Hyper Bus clock cycle CKCYC M_CK CS↑↓ -> CK↑ G_CS#_1,2 CKCYC M_CS#_1,2 Chip Select setup time DQ ->...
  • Page 132 S6J32E, S6J32F, S6J32G Series 8.4.17.3 Hyper Bus Read Timing (HyperFlash) (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks G_CK, G_RWDS Hyper Bus clock cycle RDSCYC M_CK, M_RWDS CS↑↓ -> CK↑ G_CS#_1,2 RDSCYC M_CS#_1,2 -2.0 Chip Select setup time DQ ->...
  • Page 133 S6J32E, S6J32F, S6J32G Series 8.4.17.4 HyperBus Read Timing (HyperRAM) (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks G_CK, G_RWDS HyperBus clock cycle RDSCYC M_CK, M_RWDS CS↑↓ -> CK↑ G_CS#_1,2 -2.0 RDSCYC M_CS#_1,2 Chip Select setup time DQ ->...
  • Page 134 S6J32E, S6J32F, S6J32G Series 8.4.18 Ethernet AVB Ethernet Receive Timing – MII Interface 8.4.18.1 (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks RXCLK 40.0 RXCLK cycle RXCYC RXER RXDV 10.0 -30 ns RX setup time RXCYC RXD0-3 RXER...
  • Page 135 S6J32E, S6J32F, S6J32G Series 8.4.18.3 MDIO Timing (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks 400.0 MDC cycle MDCYC MDIO input setup MDIO 100.0 (CL = 20 pF, MDIS time = -5 mA, MDIO MDIO input hold time MDIH = 5 mA), MDIO output delay...
  • Page 136 S6J32E, S6J32F, S6J32G Series Ethernet Receive/Transmit Timing – RMII interface 8.4.18.4 (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks Reference REFCLK clock cycle RMII_REFCLK Reference REFDTY clock duty cycle Data setup to RMII_REFCLK RMII_RXD[1:0], rising edge RMII_RXERR Data hold from RXDV *1...
  • Page 137 S6J32E, S6J32F, S6J32G Series 8.4.19 MediaLB 8.4.19.1 MediaLB Input Timing (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks MLBCLK MLBCLK cycle mckc MLBSIG, MLBDAT MLBSIG dsmcf MLBDAT Input setup MLBSIG, MLBDAT MLBSIG dhmcf MLBDAT Input hold Notes: −...
  • Page 138 S6J32E, S6J32F, S6J32G Series 8.4.20 QPRC (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks － － 4tCLK_LCP1A tAHL "H" width of AIN － － 4tCLK_LCP1A "L" width of AIN tALL － － 4tCLK_LCP1A "H" width of BIN tBHL －...
  • Page 139 S6J32E, S6J32F, S6J32G Series tALL tAHL tAUBU tBUAD tADBD tBDAU tBHL tBLL ｔBHL tBLL tAUBD tBDAD tADBU tBUAU tAHL tALL tZHL tZLL Document Number: 002-10689 Rev *H Page 139 of 166...
  • Page 140 S6J32E, S6J32F, S6J32G Series tABEZ tZABE AIN/BIN Document Number: 002-10689 Rev *H Page 140 of 166...
  • Page 141 S6J32E, S6J32F, S6J32G Series 8.4.21 Port Noise Filter (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks All GPIOs EINT0-15 TIN0-3, 16-19, 32-35, 48, 49 Input pulse filter ADTRG time SCL4, 10, 12, 16, 17 SDA4, 10, 12, 16, 17 Note: −...
  • Page 142 S6J32E, S6J32F, S6J32G Series 8.4.22 JTAG (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Unit Remarks JTAG_TCK, JTAG_TMS, TMS, TDI setup time ＳＲＡＭ リード JTAGS JTAG_TDI JTAG_TCK, (CL = 20 pF) JTAG_TMS, TMS, TDI hold time JTAGH ｔ...
  • Page 143 S6J32E, S6J32F, S6J32G Series 8.4.23 I2S Timing – Master mode (MSMD=1) 8.4.23.1 (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Remarks ECLK0/ECLK1 clock cycle Only relevant if ECLK0/ECLK1 clock ECLK0, 0.40* 0.60* external ECLK input is “H” pulse width ECLK1 selected.
  • Page 144 S6J32E, S6J32F, S6J32G Series I2Sx_SCK I2Sx_SD, I2Sx_WS (output timing) I2Sx_SD (input timing) I2S Timing – Slave mode (MSMD=0) 8.4.23.2 (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Conditions Remarks I2S clock cycle (input I2S0_SCK, 66.66 I2S1_SCK SCK) I2S clock “H” pulse 0.40* 0.60* width...
  • Page 145 S6J32E, S6J32F, S6J32G Series I2Sx_SCK I2Sx_WS (input timing) I2Sx_SD (output timing) I2Sx_SD (input timing) A/D Converter 8.5.1 Electrical Characteristics (Condition: See 8.2. Operation Assurance Value Parameter Symbol Pin Name Unit Remarks Resolution ±12 Total Error ±4.0 Integral Non linearity ±1.9 Differential Non linearity AN0 to AVRL...
  • Page 146 S6J32E, S6J32F, S6J32G Series Value Parameter Symbol Pin Name Unit Remarks AN0 to -1.0 µA AN17 ≤ AN18 to AVSS -2.0 µA Analog port input current AN25 − ≤V AVCC AN26 to -3.0 µA AN49 AN0 to AVSS AVRH Analog input voltage AN49 ≥...
  • Page 147 S6J32E, S6J32F, S6J32G Series 8.5.2 Notes on A/D Converters About the Output Impedance of an External Circuit for Analog Input When the external impedance is too high, the analog voltage sampling time may become insufficient. In this case, we recommend attaching a capacitor (about 0.1 µF) to an analog input pin.
  • Page 148 S6J32E, S6J32F, S6J32G Series Total error Actual 1.5LSb {1 LSb (N - 1) + 0.5LSb} sion ract eris (Actually-measured value) tics Actual conversion characteristics (measured value) Ideal characteristics 0.5LSb AVRL Analog input AVRH (AVSS) - {1 LSb × (N-1) + 0.5LSb} Total error of digital output N = [LSb] 1LSb...
  • Page 149 S6J32E, S6J32F, S6J32G Series Integral linearity error Differential linearity error Ideal characteristics Actual conversion N + 1 Actual conversion characteristics characteristics {1 LSb (N - 1) + V (measured value) N - 1 Actual conversion (N+1)T characteristics (measured (measured value) value) Ideal characteristics (measured value)
  • Page 150 S6J32E, S6J32F, S6J32G Series Audio DAC 8.6.1 Electrical Characteristics (Condition: See 8.2. Operation Assurance Value Parameter Symbol Conditions Unit Remarks Name system clock 2.048 18.432 CLKDA0 frequency sampling clock Analog output load kΩ resistance DAC_L DAC_R Analog output load capacitance µF capacitance Analog output...
  • Page 151 S6J32E, S6J32F, S6J32G Series Figure 8-7: Startup Time Last Voltage 10 mV DAC_L/DAC_R Startup Time Time [sec] Startup time can be calculated as follows. 1. Startup time (typ) = 650[ms] 2. CCOM = 10 µF × (1 ± α/100) CCOM is a capacitor connected to Terminal C_L/C_R including capacitance variance. α...
  • Page 152 S6J32E, S6J32F, S6J32G Series Figure 8-9: Coupling Capacitance (Example) Low Noise Regulator AVCC3_DAC AVSS AVSS AVSS Post LPF/ Buffer DAC_R Post LPF/ Buffer DAC_L Notes: − C1: more than 10 μF low ESR capacitors − C2: 0.1 μF ceramic capacitors −...
  • Page 153 S6J32E, S6J32F, S6J32G Series Flash Memory 8.7.1 Electrical Characteristics Value Parameter Unit Remarks 8 KB sector 1100 Internal preprogramming time included Sector erase time 64 KB sector 3700 Internal preprogramming time included µs 8bit write time System-level overhead time excluded µs 16bit write time System-level overhead time excluded...
  • Page 154 S6J32E, S6J32F, S6J32G Series Abbreviation Abbreviation Definition Remark A/D converter Analog Digital Converter Analog Digital Converter Advanced High performance Bus AMBA Advanced Microcontroller Bus Architecture Advanced Peripheral Bus ATCM TCM-A port Advanced eXtensible Interface B0TCM TCM B0 port B1TCM TCM B1 port Bit Banding Unit Boot Description Record Base Timer...
  • Page 155 S6J32E, S6J32F, S6J32G Series Abbreviation Definition Remark Noise Filter Non Maskable Interrupt Output Compare Unit OSCillator Printed Circuit Board PCBA Printed Circuit Board Assembly Pulse Coded Module Power Domain Phase Locked Loop PONR Power ON Reset Port Pin Configuration Power Saving State QPRC Quad Position &...
  • Page 156 S6J32E, S6J32F, S6J32G Series Ordering Information Table 10-1: Order Part Number Table Part Number Package LET208 S6J32GEKSMSE2000A (208-pin plastic TEQFP) LET208 S6J32GEKSNSE20000 (208-pin plastic TEQFP) LEQ216 S6J32EELTMSC2000A (216-pin plastic TEQFP) Document Number: 002-10689 Rev *H Page 156 of 166...
  • Page 157 S6J32E, S6J32F, S6J32G Series Appendix 11.1 Application 1: JTAG Tool Connection AN209861 - Getting Started with the Traveo™ This is an application example of JTAG tool connection. See the application note Family S6J3200 Series for details. +5V0_S +5V0_S +5V0_S JTAG S6J3200 ARM 20pin Vsense...
  • Page 158 S6J32E, S6J32F, S6J32G Series Document History Document Title: S6J32E, S6J32F, S6J32G Series 32-Bit Microcontroller Traveo™ Datasheet Document Number: 002-10689 Submission Revision Orig. of Change Description of Change Date 5078184 MFEU 02/04/2016 New Spec. Table 1-1 Document definition update Updated abbreviation table Added Figure 2-1: Option and Part Number"/"...
  • Page 159 S6J32E, S6J32F, S6J32G Series Submission Revision Orig. of Change Description of Change Date Section 8.4.14.: Updated MAX limit of T Added PLL lockup time Added Cycle to cycle jitter Added Output pulse position for frequencies 40, 25, 5 MHz Section 3.2: - Table 3-1: Ethernet AVB: revision numbers deleted: "ETHERNETn_revision_reg : 0x30070106 (Initial value) for revision B...
  • Page 160 S6J32E, S6J32F, S6J32G Series Submission Revision Orig. of Change Description of Change Date Added sub-sections (5)-(8) from Amber-P2 Section 8.4.12.1 Changed output delay from 8.5 ns to 9.3 ns Section 8.4.13 Added CL spec to pin load condition Added remark "Equals 1/f" for TCIP Changed format of output pulse position spec according to Amber-P2 Section 8.4.16 (all sub sections): Changed timing diagrams (removed timing parameter which are not...
  • Page 161 S6J32E, S6J32F, S6J32G Series Submission Revision Orig. of Change Description of Change Date description about guaranteed MCU operation range, updated notes, removed redundant LVDH0 spec Section 3.2: section “PLL/SSCG PLL” in Table3-1: Center spread mode usage is permitted (with conditions) Section 8.4.3:Added note about SSCG center spread mode Section 8.4.3: Added spec for Hyperbus VIH/VIL and VOH/VOL levels Section 8.4.16: Added description about VIH/VIL and VOH/VOL...
  • Page 162 S6J32E, S6J32F, S6J32G Series Submission Revision Orig. of Change Description of Change Date Section 3.2 Product Description: HyperBus I/F - Changed pointer for Hyperbus details Section 3.2.2 Product Description: section added to describe limitation of RAM Guarantee Section 4.1 Pin Assignment: Replaced pinning pictures by detailed pictures with function names Section 4.2.1 TEQFP-208;...
  • Page 163 S6J32E, S6J32F, S6J32G Series Submission Revision Orig. of Change Description of Change Date GSSEL↓ -> Section 8.4.16.1 & 8.4.16.2 DDR-HSSPI: changed timing value for G_SCLK↑ Output delay time (parameter todsel) Section 8.4.16.2 DDR-HSSPI: removed tspcnt and extended note Section 8.4.17.1, 8.4.17.2, 8.4.17.3, 8.4.17.4 Hyperbus: Corrected VOH/VOL vs VIH/VIL in picture Section 8.4.18.1 Ethernet AVB: corrected TRXH min value Section 8.4.18.3 Ethernet AVB: changed the MDIO - tMDOD max value from 190ns...
  • Page 164 S6J32E, S6J32F, S6J32G Series Submission Revision Orig. of Change Description of Change Date consumption values are with Regulator in standby mode. Section 8.4.16.2 “Hyper Bus Write Timing (HyperRAM): Added note to consider HyperRAM refresh interval Section 8.4.16.4 “Hyper Bus Read Timing (HyperRAM): Added note to consider HyperRAM refresh interval Section 8.3.2.2 “PSS Timer Mode Shutdown (PD6=OFF)”: Added note that values are with CR-oscillator disabled...
  • Page 165 - Corrected package code for TEQFP-208 from LEQ208 to LET208 5991338 ANMA 12/12/2017 Whole document: - Fixed spaces in tables - Added missing links to Cypress web pages Section 1.2 Related Documents - Updated table with links and Spec numbers Document Number: 002-10689 Rev *H Page 165 of 166...
  • Page 166 (“Unintended Uses”). A critical component is any component of a device or system whose failure to perform can be reasonably expected to cause the failure of the device or system, or to affect its safety or effectiveness. Cypress is not liable, in whole or in part, and Company shall and hereby does release Cypress from any claim, damage, or other liability arising from or related to all Unintended Uses of Cypress products.
  • Page 167 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Cypress Semiconductor S6J32GEKSMSE20000 S6J32GEKUMSE20000 S6J32GELTMSC20000 S6J32GELSMSC20000 S6J32GEKSMSE2000A S6J32EELTMSC20000 S6J32EELTMSC2000A S6J32EEKSNSE20000 S6J32EELSNSC20000 S6J32EELTPSC20000 S6J32FEKSNSE20000 S6J32FELSNSC20000 S6J32GEKSNSE20000 S6J32GELSNSC20000 S6J32GELTPSC20000 S6J32GELTNSC20000 S6J32FELTNSC20000...

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