Sony MDS-JA50ES Service Manual page 71

Pin No. Pin Name
48, 49
A11, A10
50
VSS
51
VDD
52 to 55
A03 to A00
56 to 60
A04 to A08
61
XOE
62
XCAS
63
VSS
64
XCS
65
A09
66
XRAS
67
XWE
68, 69
D1, D0
70 to 74
D2 to D6
75
VSS
76
D7
77
ERR
78
EXTC2R
79
BUSY
80
EMP
81
FUL
82 EQL
83
MDLK
84
CPSY
85
CTMD0
86
CTMD1
87 SPO
88
VSS
89
MDSY
90
LRCK
91
BCK
92
C2PO
93
DATA
94
DIDT
95
DODT
96
DIRCPB
97
MIN
98
SPOSL
99
MCK
100
VSS
I/O
O Address signal output (Not used)
— Ground
— Power supply (+5V)
O Address signal output
O Address signal output
O Output enable control signal output
O Column address strobe signal output
— Ground
O Chip select signal output (Not used)
O Address signal output
O Row address strobe signal output
O Read/write control signal output
I/O
Data signal input/output
I/O
— Ground
I/O Data signal input/output (Not used)
I/O Input/output of error (C2PO) data to external RAM (Not used)
I External RAM selection input for error data writing ("H": External RAM) (Fixed at "L")
O RAM access BUSY signal output (Not used)
EMPTY or immediately before FULL of ATRAC data (When DSC=ASC+1: "H")
O
(Not used)
FULL or immediately before EMPTY of ATRAC data (When ASC=DSC+1: "H")
O
(Not used)
O ATRAC data EMPTY (When DSC=ASC: "H") (Not used)
O Indicates recording/playback data main/sub ("H": Sub, Linking: "L": Main) (Not used)
O Interpolation sync signal output (Not used)
O
DSC counter mode output (Not used)
O
O System clock (512fs=22.5792 MHz) signal output
— Ground
O Main data sync detection signal output (Not used)
I L/R clock signal input (44.1 kHz)
I Bit clock signal input (2.8224 MHz)
C2PO signal input (Shows data error status)
I
Playback:C2PO ("H") Digital recording: D In-Vflag Analog recording: "L"
Recording: Recording audio data signal output
I/O
Playback: Playback audio data signal input
I Input of digital audio input 16-bit data from CXD2535CR
O Output of digital audio output 16-bit data to CXD2535CR
O Disc drive and EFM encoder/decoder recording/playback mode output (Not used)
I External monitor signal input
Pin 87 (SPO) input/output switching input pin ("L":IN "H":OUT) (Not used)
I
(Fixed at "H")
O RAM controller internal master clock output (Not used)
— Ground
— 93 —
Function