Sony MDS-JA50ES Service Manual page 77

Pin No. Pin Name
41, 42 VSS
43 BCKI
44 DATAI
45 LRCKI
46 INIT
47 ATT
48 SHIFT
49 LATCH
50 SYSM
51 NRGCLR
52 IFSELD
53 IFSELC
54 NC
55 SBCKI
56 SDATAR
57 SDATAL
58 NC
59 DFDTOL
60 DFBCKO
61 DFDTEN
62 TEST1
63 TEST2
64 VSS
I/O
— Ground
I Bit clock input
I Data input
I LR clock input
I Initialize input "L":Reset
I Serial data input
I Serial shift clock input
I Serial latch clock input
I External mute signal input "H":Active (Fixed at "L")
I N/S calculation section register clear signal input "H":Active (Fixed at "L")
I Data line input signal voltage level selection pin (Fixed at "L")
I Control line input signal voltage level selection pin (Fixed at "L")
— Not used
I LR clock input (during SCD mode) (Not used)
I Bit clock input (during SCD mode) (Not used)
I Data input (during SCD mode) (Not used)
— Not used
O Digital filter serial data Lch output
O Digital filter serial data output bit clock output
I Digital filter data output
I
Test pin (Fixed at "L")
I
— Ground
— 99 —
Function
"L":OFF, "H":ON