National Instruments MXI Getting Started page 53

Glossary
address space
address window
ANSI
API
arbitration
asynchronous
B
B
backplane
BERR*
block-mode transfer
BTO unit
PCI-Based MXI-2 Interfaces for Windows 2000/NT/Me/98
n
A set of 2 memory locations differentiated from other such sets in
VXI/VMEbus systems by six addressing lines known as address modifiers.
n is the number of address lines required to uniquely specify a byte location
in a given space. Valid numbers for n are 16, 24, and 32. In VME/VXI,
because there are six address modifiers, there are 64 possible address
spaces.
A portion of address space that can be accessed from the application
program
American National Standards Institute
Application Programming Interface; the direct interface that an end user
sees when creating an application
A process in which a potential bus master gains control over a particular bus
Not synchronized; not controlled by time signals
bytes
An assembly, typically a printed circuit board, with 96-pin connectors and
signal paths that bus the connector pins. A C-size VXIbus system will have
two sets of bused connectors called J1 and J2. A D-size VXIbus system will
have three sets of bused connectors called J1, J2, and J3.
Bus error signal
An uninterrupted transfer of data elements in which the master sources only
the first address at the beginning of the cycle. The slave is then responsible
for incrementing the address on subsequent transfers so that the next
element is transferred to or from the proper storage location. In VME,
the data transfer may have no more than 256 elements; MXI does not have
this restriction.
Bus Timeout Unit; a functional module that times the duration of each data
transfer and terminates the cycle if the duration is excessive. Without the
termination capability of this module, a bus master attempt to access a
nonexistent slave could result in an indefinitely long wait for a slave
response.
G-2 ni.com