Figure 3-21. 8254 Counter Timer Register Map - Brainboxes AD-593 User Manual

Register Map

Figure 3-21. 8254 Counter Timer Register Map.

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ADDRESS DEFAULT
OFFSET ADDRESS
0000 R/W 0210 Hex COUNTER 0 REGISTER
0001 R/W 0211 Hex COUNTER 1 REGISTER
0002 R/W 0212 Hex COUNTER 2 REGISTER
0003 W 0213 Hex CONTROL WORD REGISTER
Counter 0 is not used on the A/D board. Its i/o pins are shared with
the digital input port pins 34, 35, 36. Counter 0, counts pulses on
the CLK 0 input, pin 24, when the GATE 0 pins is high, pin 35. Its
output is via pin 36 of the 50 way IDC connector, provided the OUT VIA
PIN 36 jumper pin as been set.
A CLK pulse is defined as a rising edge, then a falling edge, in that
order of the CLK input. A trigger pulse is a rising edge on the GATE
input.
Counters 1 and 2 are dedicated to AD trigger functions, and provided
the XMODE bit 7 is set, can be used instead of the Pacer clock as the
source of strobes to start conversions on the A/D converter.
Chapter 3
REGISTER
AD1200 Reference
WRITE ONLY
Page 71