Watch-Dog Timer - BOSER Technology Celeron 370 Instructions Manual

2.10 Watch-Dog Timer

There are three access cycles of Watch-Dog Timer as Enable,
Refresh and Disable. The Enable cycle should proceed by READ
PORT 443H. The Disable cycle should proceed by READ PORT
045H. A continue Enable cycle after a first Enable cycle means
Refresh.
Once if the Enable cycle activity, a Refresh cycle is request before
the time-out period for restart counting the Watch-Dog Timer period.
Otherwise, it will assume that the program operation is abnormal
when the time counting over the period preset of Watch-Dog Timer.
A System Reset signal to start again or a NMI cycle to the CPU
comes if over.
The JP12 is using for select the active function of Watch-Dog Timer
in disable the Watch-Dog Timer, or presetting the Watch-Dog Timer
activity at the reset trigger, or presetting the Watch-Dog Timer
activity at the NMI trigger.
JP12 : Watch-Dog Active Type Setting
JP12 DESCRIPTION
*1-2 System Reset
2-3 Active NMI
OFF Disable Watch-Dog Timer
The Watch-Dog Timer is disabled after the system Power-On. The
Watch-Dog Timer can be enabled by a Enable cycle with reading
the control port (443H), a Refresh cycle with reading the control port
(443H) and a Disable cycle by reading the Watch-Dog Timer
disable control port (045H). After a Enable cycle of Watch-Dog
Timer, user must constantly proceed a Refresh cycle to Watch-Dog
Timer before its period setting comes ending of every 1, 2, 10, 20,
110 or 220 seconds which pre-setting by JP11(5-10). If the Refresh
cycle does not active before Watch-Dog Timer period cycle, the on
board Watch-Dog Timer architecture will issue a Reset or NMI cycle
to the system.
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