I/O Signal Detail Description - Mitsubishi Electric MELSEC QJ71PB92D User Manual

Programmable logic controllers, profibus-dp interface modules
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3 SPECIFICATIONS

3.3.2 I/O signal detail description

Exchange start request signal (Y00)
Exchange start end signal (X00)
Communication trouble detection signal reset (Y01)
Communication trouble detection signal (X01)
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(1) Exchange start request signal (Y00), exchange start end signal
(X00)
(a) After the exchange start request signal (Y00) is turned on by the sequence
program the exchange start end signal (X00) is turned on when cyclic
exchange starts.
(b) When the exchange start request signal (Y00) is turned off by the sequence
program or when an error occurs that stops the exchange, the exchange start
end signal (X00) turns off.
(c) An interlock is used for FROM/TO of the I/O data.
(d) Before the exchange start request signal is turned on the output data initial
value must be written to the buffer memory.
(2) Communication trouble detection signal (X01), communication
trouble detection signal reset (Y01)
(a) The communication trouble detection signal (X01) is turned on when a
communication trouble occurs. At the same time the RSP ERR.'s LED turns
on. At this time the error code and detailed data are stored in the buffer
memory communication trouble area.
(b) The communication trouble detection signal (X01) is turned off when the
communication trouble detection signal reset (Y01) is turned on from the
sequence program. At this time the RSP ERR.'s LED is turned off.
(c) The communication trouble detection signal reset (Y01) is turned off by the
sequence program after it has been confirmed that the communication
trouble detection signal (X01) has been turned off.
(d) The following sequence is used.
Exchange start
request
Exchange start end
Trouble detection reset
Trouble detection
FROM/TO
The error code is read from the buffer memory to the PLC CPU.
MELSEC-Q
Maximum 200 ms
Exchange
FROM
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