Gpctr1_Up_Down Signal; Figure 4-17. Gpctr Timing Summary - National Instruments 6711 User Manual

Chapter 4 Signal Connections

GPCTR1_UP_DOWN Signal

You can externally input this signal on the DIO7 pin and is not available as
an output on the I/O connector. General-purpose counter 1 counts down
when this pin is at a logic low and counts up at a logic high. You can disable
this input so that software can control the up-down functionality and leave
the DIO7 pin free for general use. Figure 4-17 shows the timing
requirements for the GATE and SOURCE input signals and the timing
specifications for the 6711/6713 device OUT output signals.
V
SOURCE IH
V
IL
V
IH
GATE
V
IL
V
OH
OUT
V
OL
The GATE and OUT signal transitions shown in Figure 4-17 are referenced
to the rising edge of the SOURCE signal. This timing diagram assumes that
the counters are programmed to count rising edges. The same timing
diagram, but with the source signal inverted and referenced to the falling
edge of the source signal, would apply when the counter is programmed to
count falling edges.
The GATE input timing parameters are referenced to the signal at the
SOURCE input or to one of the internally generated signals on the
6711/6713 device. Figure 4-17 shows the GATE signal referenced to the
rising edge of a source signal. The gate must be valid (either high or low)
for at least 10 ns before the rising or falling edge of a source signal for the
gate to take effect at that source edge, as shown by t
6711/6713/6715 User Manual
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com
t
sc
t
gsu
t
gw
t
out
Source Clock Period
t
sc
Source Pulse Width
t
sp
Gate Setup Time
t
gsu
Gate Hold Time
t
gh
Gate Pulse Width
t
gw
Output Delay Time
t
out

Figure 4-17. GPCTR Timing Summary

4-22
t t
sp sp
t
gh
50 ns minimum
23 ns minimum
10 ns minimum
0 ns minimum
10 ns minimum
80 ns maximum
and t in
gsu gh
www.ni.com