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4.2.2 Operating Specifications
AC
CHARACTERISTICS
TA
25•c,
12
=
Vee
=
V,
RL
PARAMETER
Supply ripple
rejection
KsvR
THO+N
Total
harmonic
distortion +noise
Output
integrated
Vn
Crosstalk
SNR
Signa-
l
to-noise
rato
Osci
l l
a
tor
frequency
fosc
Thermal
tr
ip poi
n
t
Thermal
hysteresis
4.3 Pinning
PIN
NAME
so
FAULT
LINP
LINN
GAl
N
O
GAI
N
1
AVCC
AGNO
GVOO
PLIMIT
R
I
NN
R
I
NP
NC
PBTL
PVCCR
PVCCR
BSPR
OUTPR
PGNO
OUTNR
BSNR
BSNL
OUTNL
PGNO
OUTPL
BSPL
PVCCL
PVCCL
(unless otherwise
noted)
=
8 0
200 mVpp ripple from 20 Hz-1kHz,
Gain
=
RL
=
8 0, f
noise
20
Hz
to 22 kHz,A-weighted filter,
P
=
1
0
Maximum
i
Gain
=
110/P
Pin
Number
Shutdown logic input
1
I
enabled).TTL
Open
compi
2
0
FAULT
be reset
3
I
Post
4
I
Negative
I
Gan
5
6
I
Gan
p
7
Analog supply
8
Analog
High-side
9
0
as supply
Power
10
I
powerlimit.
11
I
Negative audio
12
I
Positive audio
13
Not
14
I
ParallelBTL
Power
p
15
supply inputs are
Power supply for
p
16
channelpower
17
I
Bootstrap
18
0
Class-0
19
Power ground for
Class-0
20
0
21
I
Bootstrap
22
I
Bootstrap
23
0
Class-0
24
Power ground for
25
Class-0
0
26
I
Bootstrap
Power supply for
p
27
supply
Power supply
p
28
supply inputs are connect internally.
TEST
COND ITIONS
20 dB,Inputs ac-coupled to
AGNO
=
1kHz,
Po
=
3 W
(half-power)
Gan
W,Gain
=
20
dB,
f
=
1
kHz
output
at
THO+N
<
1%,
f
=
20 dB, A-weighted
for
audio amp (LOW
logic levels with
compliance
drain
output
used
to display short circuit
l
ant to
AVCC.Short
ci
r
cuit
pin
to SO pi
n
.
Otherwise,
by
cycling
PVCC.
i ive audio
input
for left channeL
audio
input
for left
channeL
i
select
least
significant
bit.
TTL
i
see
l
ct
most
significant
b
it
TTL
signalground.
Connect to
FET
gate drive
supply.Nominalvoltage
for
PLIMIT
functi
o
n
limt
i
leveladjust
Connect a
Connect
d
irectly
to
input
for
right
channe
input
for
right
channeL
connected
mode
switch
supply for
right
channel
H-bridge. Right channeland
connect
internally.
right
channel H-bridge.
supply inputs are connect
110
for
right
channel,
H-bridge positive output
the
H-bridges.
H-bridge
negati
v e
output
1/0 for right channel,
negative
1/0
for
left channe
,
l
negative
H-bridge
negative
output
the
H-bridges.
H-bridge positive output
1/0
for
left channe
,
l
positive high-side
left channelH-bridge. Right
inputs
are
connect internally.
for
left
channelH-bridge.
MIN
TYP
-70
0.06
i
=
20
dB
-80
-100
1
kHz,
102
250
310
150
DESCRIPTION
=
outputs Hi
-
Z,HIGH
to AVCC.
or
de detect
fault
faults
can
be
set
to
auto-recovery
both
short c ircuit faults and
de
Biased
at 3V.
Biased
at
3V.
logic
levels
with
comp liance
logic leve ls with compliance to AVCC.
the
thermal
pad.
is
7V.
Also should be
resistor
divider from
GVOO
GVOO
for
no power
l
imit.
l Biased
.
at 3V.
Biased at
3V.
left
Right channelandleft
internally.
positive
high-side FET.
for
right
channel.
for
right
channel.
high-side
FET.
high-side
FET.
for
left
channel.
for left
channeL
FET.
channel
and left
Right
channel
and
left
MAX
UNIT
dB
%
65
IJV
dBV
dB
dB
350
kHz
·
c
·c
15
=
outputs
status.Vot
l
age
by
connecti
n
g
detect
faults
must
to
AVCC.
used
to
GND
to set
channelpower
channel
power
channel
power
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