Sony WLL-RX55 Maintenance Manual page 121

CXD9153R (SONY)
OFDM DEMODULATOR
—TOP VIEW—
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PIN PIN
I/O SIGNAL I/O SIGNAL
NO. NO.
PD0 TCK6
1 I 53 I
TESTSW0 D.V
2 I 54 — CC
3 — D.GND 55 — D.GND
4 I TESTSW1 56 I/O TDILDB0
A.GND TDILDB1
5 — 57 I/O
6 — A.V 58 I/O TDILDB2
CC
ADVRH TDILDB3
7 O 59 I/O
8 I AIFDT 60 — D.GND
A.GND D.V
9 — 61 — CC
10 — A.GND 62 I/O TDILDB4
AOUT TDILDB5
11 O 63 I/O
12 O DAVRN 64 I/O TDILDB6
DAVRP
13 O 65 I/O TDILDB7
14 — A.V 66 I/O TDILDB8
CC
15 — D.GND 67 I/O TDILDB9
CRESET TDILDB10
16 I 68 I/O
17 I EA 69 I/O TDILDB11
EXCKEN D.V
18 I 70 — CC
19 — D.V 71 I/O TDILDB12
CC
CLOCK D.GND
20 I 72 —
21 I IBUSDT0 73 — D.V
CC
IBUSDT1
22 I 74 I/O TDILDB13
23 I IBUSDT2 75 I/O TDILDB14
TCK7
24 I 76 I/O TDILDB15
25 I PLLA 77 O OTDILCS
26 — A.GND 78 O OTDILWE
A.V D.V
27 — CC 79 — CC
28 I IBUSDT3 80 O OTDILOE
IBUSDT4
29 I 81 I NWR
30 I IBUSDT5 82 I/O SDA
IBUSDT6
31 I 83 I/O SCL
32 I IBUSDT7 84 — D.V
CC
TCK0
33 I 85 — D.GND
34 — D.V 86 — D.V
CC CC
IBUSDT8
35 I 87 I NRD
36 I IBUSDT9 88 O NOE
TCK1
37 I 89 O INTR
D.GND
38 — 90 O ICERR
TCK2
39 I 91 O OTDILAB0
IBUSDT10
40 I 92 O OTDILAB1
41 I IBUSDT11 93 O OTDILAB2
TCK3
42 I 94 O OTDILAB3
43 — D.V 95 O OTDILAB4
CC
IBUSDT12
44 I 96 — D.GND
TCK4
45 I 97 —
D.V
CC
D.GND
46 — 98 O OSCLK
47 I IBUSDT13 99 O
OTDILAB5
48 I IBUSDT14 100 O OTDILAB6
RESET
49 I 101 O OTDILAB7
50 — D.GND 102 O OTDILAB8
TCK5
51 I 103 O OTDILAB9
52 I IBUSDT15 104 O OTDILAB10
WLL-RX55
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100
95
90
85
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75
70
65
60
55
53
PIN PIN
I/O SIGNAL I/O SIGNAL
NO. NO.
105 O OTDILAB11 157 O OBUSADT9
OTDILAB12 OBUSADT10
106 O 158 O
107 — D.GND 159 O OBUSADT11
108 O OBCLK 160 O OBUSADT12
OTDILAB13 OBUSADT13
109 O 161 O
110 O OTDILAB14 162 O OBUSADT14
OTDILAB15 OBUSADT15
111 O 163 O
112 O OTDILAB16 164 — D.GND
OTDILAB17 D.V
113 O 165 — CC
114 — D.V 166 O OFCLK
CC
OQCLK OBUSADT16
115 O 167 O
116 O OTDILAB18 168 O OBUSADT17
117 O OTDILAB19 169 O OBUSADT18
118 O OTDILAB20 170 O OBUSADT19
119 — D.GND 171 O OBUSADT20
SMPCK OBUSADT21
120 I 172 O
121 O OTDILAB21 173 O OBUSADT22
OHCLK OBUSADT23
122 O 174 O
123 — D.V 175 O OBUSADT24
CC
OASIEN D.GND
124 O 176 —
125 O OTPSERR 177 — D.V
CC
126 O OTPSST 178 O OBUSADT25
127 O OTPSDT 179 O OBUSADT26
128 O OTSERR 180 O OBUSADT27
129 — D.V 181 O OBUSADT28
CC
130 — D.GND 182 — D.V
CC
D.V D.V
131 — CC 183 — CC
132 O OTSVAL 184 O OBUSADT29
133 O OTSST 185 O OBUSADT30
134 O OTSDT0 186 O OBUSADT31
135 O OTSDT1 187 I/O OAGCP
PD1
136 O OTSDT2 188 I
137 O OTSDT3 189 — D.GND
138 — D.V 190 — D.V
CC CC
139 O OTSDT4 191 O TDO
140 O OTSDT5 192 O PLLL
PD2
141 O OTSDT6 193 I
142 — D.GND 194 I ADR0
143 O OTSDT7 195 I ADR1
144 O OTCLK 196 I CCR0
145 O OBUSADT0 197 I CCR1
146 O OBUSADT1 198 I BUSEN
147 — D.V 199 I TRST
CC
148 O OBUSADT2 200 — D.GND
149 O 201 — D.V
OBUSADT3
CC
150 O OBUSADT4 202 I TCK
151 O 203 I
OBUSADT5 TDI
152 O OBUSADT6 204 I TMS
153 O OBUSADT7 205 I ADR3
154 — D.GND 206 I ADR2
155 O ODCLK 207 I CNFGEN
156 O OBUSADT8 208 I CNFGSW
INPUTS
ADR0 - ADR3 : IIC ADDRESS
AIFDT : ANALOG INTERMEDIATE FREQUENCY OFDM SIGNAL (4.5 MHz)
BUSEN : BUS ENABLE
CCR0, CCR1 : IIC CLOCK
CLOCK : SYSTEM CLOCK (18 MHz)
CNFGEN : CONFIGURATION ENABLE
CNFGSW : CONFIGURATION SWITCH
CRESET : CLOCK DRIVER RESET
EA : FOR VPD
EXCKEN : CLOCK ENABLE
IBUSDT0 - IBUSDT15 : DATA BUS
NRD : IIC READ ENABLE
NWR : IIC WRITE ENABLE
PD0 PD2
- : POWER DOWN FOR ANALOG BLOCK
PLLA : TEST
RESET : CHIP RESET
SMPCK : SAMPLING CLOCK FOR ASI DATA
TCK, TDI, TMS, TRST : TEST
TCK0
: TEST CLOCK (54.86 MHz)
TCK1
: TEST CLOCK (36.57 MHz)
TCK2
: TEST CLOCK (18.29 MHz)
TCK3
: TEST CLOCK (13.71 MHz)
TCK4
: TEST CLOCK (9.14 MHz)
TCK5
: TEST CLOCK (6.86 MHz)
TCK6
: TEST CLOCK
TCK7
: SCAN TEST CLOCK
TESTSW0, TESTSW1 : TEST MODE
OUTPUTS
ADVRH : REFERENCE VOLTAGE FOR A/D
AOUT : CONTROL VOLTAGE FOR VCXO
DAVRN, DAVRP : REFERENCE VOLTAGE
ICERR : IIC ERROR
INTR : IIC INTERRUPT
NOE : IIC VALID
OASIEN : ASI ENABLE FLAG
OBCLK : OUTPUT BCLK (6.85 MHz)
OBUSADT0 - OBUSADT31 : DATA BUS
ODCLK : OUTPUT DCLK (18.29 MHz)
OFCLK : OUTPUT FCLK (36.57 MHz)
OHCLK : OUTPUT HCLK (54.48 MHz)
OQCLK : OUTPUT QCLK (13.7 MHz)
OSCLK : OUTPUT SCLK (9.14 MHz)
OTCLK : TS PACKET CLOCK
OTDILAB0 - OTDILAB21 : TIME INTERLEAVE ADDRESS
OTDILCS : EXTERNAL SRAM CHIP SELECT
OTDILOE : EXTERNAL SRAM OUTPUT ENABLE
OTDILWE : EXTERNAL SRAM WRITE ENABLE
OTPSDT : TPS DATA
OTPSERR : TPS ERROR FLAG
OTPSST : TPS START FLAG
OTSDT0 - OTSDT7 : TS PACKET DATA
OTSERR : TS PACKET ERROR FLAG
OTSST : TS PACKET START FLAG
OTSVAL : TS PACKET VALID
PLLL : PLL LOCK FLAG
TDO : TEST
INPUTS/OUTPUTS
OAGCP : TRI-STATE BUS
SCL : SERIAL CLOCK
SDA : SERIAL DATA
TDILDB0 - TDILDB15 : TIME INTERLEAVE DATA
IC
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