Table of Contents
Advertisement
t
J
1
PIN
NUMBER
26
27
28
29
30
31
32
33
34
35
36
37
38
T abl
e
2-2
Connecto
r
P2 PIA
Interface
Signals (C
ontd)
SIGNAL
MNEMONICS
SIGNAL NAME AND DESCRIPTION
GND
GROUND - Signal
return
line.
PB5-1
PERIPHERAL data
line (Section
B,
bit
5,
PIA
1)
-
Same as
PBO-1
on
pin
17
excep
t
bit
5
of the
B data
direction
register
cont rols
thi
s
line.
GND
GROUND
-
Signal return
line.
PB6-1
PER
IPHERAL
data line
(Section
B,
bit6, PIA1)
-Sameas
PBO-1 on pin
17
except
bit 6 of
th
e
B data
direction
registe
r
cont
rol
s
this
li ne.
GND
GROUND
-
Signal
retu
rn
line.
PB7-1
PERIPHERAL
data
line
(Sec
ti on
B,
bit
7, PIA
1)
-
Same as PBO-1 on
pin
17
except bit
7
of
th
e
B data d irection
register co ntrols
this
lin
e.
GND
GROUN
D
- Signal
return
line.
PAO-2
PERIPHER AL
data line (Sec
ti on
A,
bit 0,
PI
A2)
-Thi
s
peripheral data line
in
Section A of
PIA2
(U21)
can be
pro-
g
ramm
ed
to act either as an
input lin
e
or
as an
output line.
A
"0"
in
bit 0 of
th
e
A
data di rection
reg ister causes
th is
line to fun ction
as
an
input
and
a
"
1"
causes this li ne to
function
as an output.
GND
GROUND -
Sig
nal retu
rn
line.
PA1-2
PERIPHERA
L
data
line
(Sec
ti
on
A,
bit
2, PIA2)
-
Same
as PAO-2
on
pin
33
except
bit
1
of
th
e
A data
directi
on
register
con
trol
s
thi
s
lin
e.
GND
GROUND
-
Signal
return
li
ne.
PA2-2
PERI PHERAL data line
(Sec
tion
A,
bit
2,
PI
A2) -
Same
as
PAO-2
on
p in
33
except
b
it
2 o
f
the
A
data direction
registe
r
co
ntrol
s
thi
s
lin
e.
GND
GROUND -
Signal
retu
rn
line.
2-13
Advertisement
Table of Contents
