Motorola M68MM01 Manual page 21

Table 2-2 Connector P2 PIA Interface Signals (Contd)
PIN SIGNAL
NUMBER MNEMONICS
SIGNAL NAME AND DESCRIPTION
13
except bit 6 of the A data direction
(Contd)
register controls this line.
14 GND GROUND - Signal return line.
15 PA7-1 PER IPHERAL data line (Section A,
bit 7, PIA 1) - Same as PAO-l on pin 1
except bit 7 of the A data direction
register controls this line.
16 GND
GROU ND - Signal return line.
17
PBO-l PER IPHERAL data line
(Section B,
bit 0, PIA 1) - Negative true buffered output.
This peripheral data line in Sec tion B
of PI A 1 (U20) must be programmed to
operate as an output line. A "1" in bit 0
of the B data direction register causes
this line to function as an output.
18 GND GROUND - Signal return line.
19 PB1-1
PERIPHERAL data line (Section B,
bit 1, PIA 1) - Same as PBO-l on pin 17
except bit 1 of the B data direction register
controls this line.
20 GND GROU ND - Signal return line.
21 PB2 -1 PER IPHERAL data line (Sectio n B,
bi t 2, PIA 1) - Same as PBO-l on pin 17
except bi t 2 of the B data d irec tion
register controls this line.
22 GND GROUND - Signal return line.
23 PB3-1 PER IPHERAL data line (Section B,
bit 3, PIA 1) - Same as PBO- l on pin 17
except bit 3 of the B data direction
register controls this line.
24 GND GROUND - Signal return line.
25 PB4- 1 PERIPHERAL data line (Section B,
bit4 , PIA1)-SameasPBO-l onpin 17
except bit 4 of the B data di rection
registe r controls this li ne.
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