D0 L1.2; D3 Cold L2 - Fibocom L850-GL Series Hardware Manual

PCIe Link State PERST# CLKREQ#

D0 L1.2

H
L
D3 L2
cold
L
3.3.4.1 D0 L1.2
Module supports PCIe goes into D0 L1.2 state in Win10 system. The D0 L0@S0/S0ix→
D0 L1.2@S0/S0ix→D0 L0@S0/S0ix timing is shown in figure 3-10:
+3.3V
FCPO#
RESET#
PERST#
CLKREQ#
Module State
Note：
When USB is used as data transfer interface in Chrome/Android/Linux OS, there is no PCIe link
state. But when USB goes into suspend it also needs to follow the timing above (If PERST# and
CLKREQ# are floating, don't control PERST# and CLKREQ#).
3.3.4.2 D3 L2
cold
Module supports PCIe goes into D3
woken up by both modem and host. The D0 L0@S0/S0ix→D3
is shown in Figure 3-11 and Figure 3-12:
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FIBOCOM L850-GL Series Hardware Guide
Power Consumption
(mA)
H I
sleep
H I +0.5
sleep
L I +0.8
sleep
D0 L0@S0/S0ix
Figure 3-10 D0 L1.2 timi
L2 state in Win10 system. In D3
cold
Description
Refer
The extra 0.5mA is consumed on
PERST# pull down
The extra 0.3mA is consumed on
CLKREQ# pull down
D0 L1.2@S0/S0ix
L2 state, PCIe link can be
cold
L2@S0/S0ix→D0 L0@S0/S0ix timing
cold
3.2.3 Power Consumption
D0 L0@S0/S0ix
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