Frequency Stop Detection Function; Fout Function [Clock Output Function]; Battery Backup Switchover Function - Epson RX8130 CE Applications Manual

RX8130CE

14.5. Frequency stop detection function

This flag bit indicates the retained status of clock operations or internal data. Its value changes from "0" to "1"
when data loss might have occureddue to supply voltage drop. Once this flag bit's value is "1", its value is
retained until a "0" is written to it.
During the initial power-on (from 0V) and if the value of the VLF bit is "1" when the VLF bit is read, be sure to
initialize all registers before using them.
14.5.1. Related registers for Frequency stop detection function and Voltage low detection function.
Address[h]
1D
1) VLF bit
VLF
Write
Read
14.6.FOUT function [clock output function]
The clock signal can be output via the FOUT pin. Output is stopped upon detection of the voltage drop below
V In this case pin output becomes Hi-z.
DET1
14.6.1. FOUT control register.
Address[h]
1C
14.6.2. FOUT function table.
2) FSEL1,FSEL0 bit
FSEL1
0
0
1
1
: don't care
 At the time of the initial power-on, "0" is set to FSEL1, FSEL0.
Note: The effect of STOP bit to FOUT functions.
When STOP = "1", 32768Hz and 1024Hz output is possible.
But 1Hz output is disabled.
14.7. Battery ba ckup switchover function
14.7.1. Description of Battery backup switchover function
It consists of the power-source detector "V
and built-in three MOS switches located between the main power-source pin "V
pin "V ".
BAT
By switching three MOS switchs according to the result of the supply-voltage detection of V
supply is changed from V
Thanks to the 3 MOS-switches, this power switching is performed without a reverse-current (from V
At the time VDD drops below VDET1 voltage (there are 2 options for VDET1, VDET11 and VDET12, which can
be selected with RSVSEL-bit), the I/F-pins and FOUT-pin are deactivated (depenging on register settings) and a
Reset-signal is output on the /RST-pin allowing to reset i.e. MCUs to avoid malfunction due to low supply voltage.
Until VDD drops below VDET2-voltage, the RTC will remain in normal operation mode and keep charging VBAT
(depending on related register settings and conditions). Only if VDD drops below VDET2, the RTC will switch the
power supply from VDD to VBAT.
Function bit 7
Flag Register VBLF
Data
0 The VLF is cleared to 0, and waiting for next low voltage detection.
1 Invalid (writing a 1 will be ignored)!
0 RTC register data are valid.
RTC register data are invalid.
1 Should be initialized of all register data.
VLF is maintained till it is cleared by zero.
Function bit 7
Extension Register
FSEL1 FSEL0
FSEL0
0
1
0
1
DET
to V (at the same time the RTC switches from normal to backup operation).
DD BAT
Page28
bit 6 bit 5 bit 4
 UF TF
Description
bit 6 bit 5 bit 4
USEL TE
output
32768HzOutput
1024HzOutput
1HzOutput
OFF
" which detect the power down of the main power source "V
bit 3 bit 2 bit 1
AF RSF VLF
bit 3 bit 2 bit 1
WADA TSEL2 TSEL1 TSEL0
" and the backup power supply
DD
, the RTCs power
DET2
->V
BAT
ETM50E-05

bit 0
VBFF
bit 0
",
DD
).
DD